Electric Circuits 1-2 GATE ACADEMY PUBLICATIONS,

1. 1 Concept for Parameter of Circuit Element

Question 1
Oassify electrical circuit or network.
Ans. The behavior of the entire network depends on the behavior and characteristics of its
elements. The classification of networks can be shown as,
Electrical circuits or networks

CD 0 0
Active Passive Linear Nonlinear Unilateral Bilat~I Lumped Distnouted

Question 2
Define following electrical network :
1. Linear and Non-linear network [CSVTU Dec 2014 (EEE)]
2. Bilateral and Unilateral network
[CSVTU May 2009, 2008, Dec 2014 (EEE), 2013 (EEE), 2012]
3. Active and Passive network
[CSVTU May 2015 (EE & EEE), 2007, 2007, Dec 2013 (EEE), 2012]
4. Lumped and Distributed network [CSVTU May 2007}
Ans. 1. Linear network : A circuit or network whose parameter i.e. elements like
resistances, inductances and capacitances are always constant irrespective of the
change in time, voltage, temperature etc. is known as linear network. The Ohm's
law can be applied to such network. The mathematical equations of such network
can be obtained by using the law of superposition. The response of the various
network elements is linear with respect to the excitation applied to them.
Non-linear network : A circuit whose parameters change their values with change
in time, temperature, voltage etc. is known as non-linear network. The Ohm's law
may not be applied to such network. Such network does not follow the law of
superposition. The response of the various elements is not linear with respect to
their excitation. The best example is a circuit consisting of a diode where diode
current does not vary linearly with the voltage applied to it.
2. Bilateral network: A circuit whose characteristics, behavior is same irrespective
of the direction of current through various elements of it, is called bilateral
network. Network consisting only resistances is good example of bilateral
network.
R, Ri
+• • • •
¥NI, ¥NI,

__,. +
I I +--
R, =Ri
GATE ACADEMY PUBLICATIONS• 1 3
- Develop ment of Circuit Concepts

~nila~eral network : A circuit whose operation, behavior is depend ent on the

directi on of the curren t throug h various elements is called unilateral network.
Circuit consist ing diodes, which allows flow of current only in one direction is
good examp le of unilate ral circuit.
RI
+••---+@......,~------· ••---- -te-M -+--- -.... r

3. Active elements : The elements that supply energy to the circuit is called active
element. Examples of active elements include voltage and current source,
genera tors, and electronic device that require power supplies. A transistor is an
active circuit element, meanin g that it can amplify power of a signal. On the other
hand, transfo rmer is not an active elemen t because it does not amplify the power
level and power remain s same both in primar y and secondary sides. Transformer
is an examp le of passive element.
Passive elemen ts: Resistors, inductors, and capacitors are passive elements which
take energy from the sources and either convert it to anothe r form or store it in an
electric or magne tic field. The three passive circuit elements are shown in figure.

R L cl
4.
T
Lumped network : A networ k in which all the networ k elements are physically
separab le is known as lumped network. Most of the electric networks are lumped
in nature, which consists elements like R, L, C, voltage source etc.
Distributed networks : A networ k in which the circuit elements like resistance,
inducta nce etc. cannot be physically separable for analysis purposes, is called
distrib uted network. The best example of such a network is a transmission line
where resistance, inductance and capacitance of a transmission line are distributed
all along its length and cannot be shown as separate elements, anywhere in the
circuit.
11.2 Passive Element : Resistance, Inductance and Capacitance

[Link] ~
Explai n:
· 1. Resistance 2. Inductance 3. Capacitance
Ans. The three basic linear passive elements used in various circuits are Resistance,
Inductance and Capacitance.
Resistance : It is the proper ty of the material by which it opposes R
1
o
the flow of current throug h it. The resistance of element is denoted o - VM
i\ + V -
by the symbol 'R' . Resistance is measur ed in ohms (O,.
 GATE ACADEMY [Link].,!
1-4
Electric Circuits . . by Ohm's law,
The relation between voltage an d current 1s given
1
V =R
. th form of heat. So power absorbed by the resistor is
Resistor dissipates energy m e
given by,
v2
p =VI= (I.R)l = 12 R = Rwatts .
.
t
Inductance : Induc ance 1
·s the element m w hi ch energy is stored m the form H of
. db 'L' and it is measured in enry
electromagnetic field. The inductance is de~ote y of
(H). For inductance, the voltage is proportional to the rate o ~ ·1of.o1 o
change of current. + V -
di di
Voc- ⇒ V=L-
dt dt · f Id.
Capacitance : An element in which energy is stored in the fo~ .of electrostda~c Fie dis
. . d enot ed by 'C' and 1t 1s measure m ara s
known as capacitance. The capacitance 1s
(F). For capacitor, the voltage is proportional to the charge.
J
V oc Q ⇒ V oc idt
---~~---,1
+ °"
0
1

v(t) c
V= ~ fidt ⇒ i=C~ O T
I 1.3 Active Element : Voltage and Current Source
Question 4
Define ideal voltage and current source. . ·· · ·
·· ·. [CSVfU May 2008, Dec 2014 (EEE); 2013 (EEE)]
Ans. Voltages and currents in a circuit are imposed by sources. In practical circuits, There
are many types of source, such as batteries and solar cells, but from a circuit analysis
viewpoint we need to consider only two ideal sources : the voltage source and the
current source. In practical sources can be modeled by a combination of ideal sources
and other circuit elements.
Ideal voltage source : The circuit symbols for the ideal voltage source are
shown in figure The ideal voltage source V, has a voltage V between its V
terminals (in the direction indicated by the arrow), no matter what current is
flowing in the source.
For example, an ideal 5 V source has a voltage of 5 V across its terminals, for
currents of 1 mA, 1 A or 1000 A. This behavior contrasts with a real source, in which
the terminal voltage reduces as the current drawn increases. The current drawn from
an ideal voltage source depends only on the circuit to which it is connected.
Ideal current source : The ideal current source, shown symbolically on the
right in figure, produces the specified current I.
Whatever the voltage across the source terminals. An ideal current source I t
of 2A produces the appropriate voltage across its terminals to ensure that 2A
is pushed into the circuit to which it is connected. Therefore, the terminal
GATE ACADEMY PUBLICATIONS~ 1-5 Development of Circuit Concepts

voltage of the ideal current source is determined by the external circuit.

Question 5
Define dependent voltage and current source. [CSVTU May 2016 (EEE)]
Ans. Dependent voltage source : A dependent voltage source which changes in some
described manner with the conditions on the connected circuit is shown by the
diamond-shaped symbol in figure.
Since the control of the dependent voltage source is achieved by a voltage or
current of some other element in the circuit, and the source can be voltage or current,
it follows that there are two possible types of dependent voltage sources, namely:
(i) A voltage-dependent voltage source (VDVS) : It produces a voltage as a function
of voltages elsewhere in the given circuit. This is called VDVS. It is shown in the
figure.

(ii) A current-dependent voltage source (CDVS): It produces a voltage as a function

of current elsewhere in the given circuit. This is called CDVS. It is shown in the
figure.

Dependent current source : A dependent current source which changes in some

described manner with the conditions on the connected circuit is shown by the
diamond-shaped symbol in figure.
Since the control of the dependent current source is achieved by a voltage or
current of some other element in the circuit, and the source can be voltage or current,
it follows that there are two possible types of dependent current sources, namely :
(i) A voltage-dependent current sources (VDCS) : It produces a current as a function
of voltage elsewhere in the given circuit. This is called VDCS. It is shown in the
figure.

(ii) A current-dependent current source (CDCS): It produces a current as a function

of current elsewhere in the given circuit. This is called CDCS. It is shown in the
figure.
 Electric Circuits 1-6 GATE ACADEMY PUBLlCATIONs,
""'-

K is constan t and v1and [Link] the voltage and current respecti vely, present
elsewhe re in the given circuit. The depend ent source are also known as controlled
sources .
I 1.4 Duality of Simple Circuit
Que~tl bi\--:6 ,
Whal ,'i.s -dual network ? Explain the procedu re to obtain dual rietw'otk ;ffif 'given
network . [CSVTU May ,2')J:~,,t>,e(20061
Or
Explain ,t he,[Link] of duality. [CSVTU May 2015 (EE8), P~~{z008]
?~<: '.1~~
Or -:~:::t/ />;~ /. -~
..

,;:,;. p~ '.~

--;;-
- , --- ; -

Explain property of duality. [CSVTU Dec 2010, 2011, 2013 (EEE)) May~13]
Or
, ,

Define dµality of a circuit with neat diagram s. [CSVTU Dec 2014 (EEE)i 2,Q97J _
Or
'Y- _..,
Explain the graphical procedu re of constru ding the dual of network .
-[CSVTU May 2014,-(EEE)l
Ans. Two circuits are duals if the mesh equatio n that characte rize one of them have the
same mathem atical form as the nodal equatio n that characte rize the other. They are
said to be exact duals if each mesh equatio n of one circuit is numeric ally identica l with
the corresp onding nodal equatio n of the other.
For example Ohm's law may be stated in v form as,
v=Ri . . ... ... (i)
or in i form as, i = Gv ... ..... (ii)
Equatio n (ii) may be derived from (i) by solving for i and replacin g ..!_ by G note that
R
either equatio n may be formed from the other by replacin g each symbol by its pair
opposit e i by v, v by i, R by G and G by R.
There is a systema tic symmet ry of opposit e or duality between resistanc e and
conduct ance, current and voltage and series and parallel .
Two circuits are said to be duals of one another if they are describe d by the saine
characte rizing equatio n with dual quantity intercha nged.
Circuits where the cut set matrix of one corresp onds to Tieset matrix of the other
are the Duals of each other.
GATE ACADEMY PUBLICATIONS • 1-7 Development of Circuit Concepts
Let us consider the following two circuits shown in figure,
R L

V C R L C

(a) (b)
By KVL in figure (a), we get

V = iR+L di+_!_ ridt

dt c1
By KCL in figure (b), we get

i=vG+Cdv +.!_ rvdt

dt L 1
The KVL and KCL of either figure are identical and this illustrates the principle of
duality.
Conversion of dual electrical circuit :
Voltage Current
Resistance Conductance
Inductance Capacitance
Open circuit' Short circuit
Ind. Voltage source Ind. Current source
VDVS CDCS
CDVS VDCS
Series Parallel
Mesh Node
KVL KCL
Procedure to obtain dual network :
1. Put a dot per mean loop current i.e. in each mesh of the given network. These
interval dots correspond to independent nodes in the dual network.
2. Put one reference dot for reference, outside the circuits.
3. Connect one element from an internal dot to adjoining or to the reference taking
only one element at a time.
4. Draw the dual between the same nodes in steps.
5. Magnitude of dual in step 4 will be same only the unit for example ( 5 n will be
5 tJ ).
6. Clockwise current cutting at a node will reject as current in to the node of the dual.
 =A~rn
~~~~~- - - - - - - ~1~-~8~ - -~G oN -
;;;.;A~C_m_ E_M_Y P_~_ Ll~C~A~n~
! lectric Circuits

em
~r~o~b=l~=
ll~1:#·:::5~P ~=e
~~B~as ~d~o ~a~l=i~
~u
~n~D y =======-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-==...:::~
t~
Question 7
Obtain the dual of the circuit shown in figure.
15H

3F 10 n t 8A

Ans. We first locate nodes 1, 2, 3 and reference node 0 as shown in figure

Joining node 1 and 2 we cross the 3F capacitor which is replaced by a 3H inductor.

Joining node 2 and 3 we cross the 10 n resistor which is replaced by 10 V resistor.
Joining node 2 and 0 we cross 15 H inductor which is replaced by 15 F capacitor.
Joining node 1 and Owe cross SV, voltage source which is replaced by SA current
source and similarly last joining node 3 and 0 we cross 8A current source which is
replaced by 8 V voltage source. The dual circuit is redrawn in figure.
To verify the polarity of voltage source and direction of the current source we may
apply mesh current 4, i2 and i3 (all in clock wise direction) in the original circuit.
The SV, voltage source produce positive mesh current i1 so that its dual is a SA
current source directed from Oto 1 also i3 = -8A in fig has its dual V = -8V .
1 3H 2 lOU 3

5A t 15F
- 8V
+

Question 8
State one limitation of duality. Find the dual of the network graphically and clearly
state the steps involved. [CSVTU De<: 2013 (EE)]
GATE ACADEMY PUBLICATIONS• 1-9 Development of Circuit Concepts

SH

2F 200

Sol. Limitati on of duality : The dual network s are not equivale nt network s of each other.
Principle of duality only implies that circuit equation s are of the same mathem atical
form and the dual network s behave similarly but with intercha nged variables. We first
locate nodes 1, 2, 3 and reference node 0 as shown in figure

10 .
2F
···· · ·O····· · ··
( 1

..

Joining node 1 and 2 we cross the 2F capacitor which is replaced by a 2H inductor .

Joining node 2 and 3 we cross the 20 !lresisto r which is replaced by 20 Uresistor.
Joining node 2 and Owe cross 5 H inductor which is replaced by 5 F capacitor. Joining
node 1 and Owe cross 10 V, voltage source which is replaced by 10 A current source
and similarl y last joining node 3 and 0 we cross 3 A current source which is replaced
by 3 V voltage source. The dual circuit is redrawn in figure.
To verify the polarity of voltage source and direction of the current source we may
apply mesh current ii, ~ and ~ (all in clock wise direction) in the original circuit.
The 10 V, voltage source produce positive mesh current ;1 so that its dual is a 10 A
current source directed from Oto 1 also i3 = - 3 A in figure has its dual V = - 3 V .

Dual network
l 2H 2 200 3

5F
Electric Circuits 1-10 GATE ACADEMY PUBLICATIONS ,

Quest ion 9
Draw the dual of the networ k shown in figu re. [CSVT U Dec 2006]

Ans. First step is to n1ark the node in each of the loop and a referen ce node outside the
circuit and joining all the node until all the elemen t are crossed .

Dual circuit :

1 2 3

V
g
+
-

Questi on 10
Draw the dual of the network shown in figure.
[CSVT U May 2011]
20Q

2F
50V :!: · SH 10 n
GATE ACADEMY PUBLIC ATION S~ 1 -11 Development of Circuit Concepts

Ans. Mark the node in each of the loop and a reference node outside the circuit and joining
all node until all the elemen t are crossed.

Dual circuit :
5F

50A t 20V 2H IOV

Question 11
Draw the dual of networ k shown in figure. [CSVTU Dec 2010]
10 1H

.!_F 3F
2

Ans. Mark the node in each of the loop and a reference node outside the circuit and joining
all nodes until all the elemen ts are crossed.
 I
Electric Circuits 1-12 GATE ACADEMY PUBLICATIONS,
~
Dual circuit :
.!_ H
1 2 2

lU 1F 3H

Question 12
Draw the dual of the network shown below. [CSVl'U May 2014 (EEE)l
2H 4F

5V 2: ♦ lA lH

2.0
Sol. Mark the node in each of two loop and a reference node outside the circuit and joining
all the nodes until all the elements are crossed
.,.--------· ·····.. 2H 4F _.----· ·····...\

'' '
' ''
i1 lA l2
5V :!: ----------(♦ - ------- ! ----- --~\----------- 1H

lF: 20 j

····...... ·.·............. , . "',,

,'
, ,,"', ,
,"'

.... .... .. , ,,' ,,"

-------:::-_:·::>\t/:::<-----
_ o
Dual circuit:
1 lV

5A t lH 2F 20 lF 4H
--
GATE ACADEMY PUBLICATIONS • 1 - 13 Develop ment of Circuit Concepts

Quest ion 13
Draw the dual of the network shown in figure. [CSVTU May 2010]

20 µF 50 0 400 5H

Ans. Mark the node in each of the loop and a reference node out side the circuit and joining
all the nodes until all the elemen ts are crossed.

Dual circuit:
I 50U 2 40U 3

200 20µH 2V + IOU SF

Question 14
Constru ct the dual of the circuit in figure.
t =0

6V + 2H IOmF

Ans. Make the node in each of the loop and a reference node outside the circuit and joining
all the nodes until all the elemen ts are crossed .
 1-14
GATE ACADEMY [Link]~
Electric Ciinwts
--- -- --- ---- ~
,,
-- --- ''
/

, / '
I
'\ \
I \

](i) mF
I
I 2 \

:
I

6 V ,,/
---•--- \
I
I

I , '\
I I I

,.,
p p
I
I

\
\
, I

I
/

Dual circuit:
2F 2
1

6A t 2U s.c IOmH

Question 15
Draw the dual of the network shown in figure.
R1 V

[CSVTU May 2015 (EE), Dec 2008, 2011, 2014 (EE), 2015 (EEE)l
Ans. Mark the node in each of the loop and a reference node outside the circuit and joining
all nodes until all the elements are crossed.
--------- .... ....
------ ''
-- -- ' '
' \
\
\
\
\
\
I
I
I
,
I
GATE ACADEMY PUBLIC ATIONS • 1 - 15 Developm ent of Circuit Concepts
Dual circuit :

I t GI C

Question 16

For the circuit given below in figure find dual network. [CSVTU May 2009)

Ans. Mark the node in each of the loop and a reference node outside the circuit and joining
all node until all the elements are crossed.

Dual circuit :

It G, C
Qu est ion 17 . . . [CS VT U. Ma y 2013, ~e c 2014 fE£t)
(a) Wh at 1s nor ma lizm g factor.7
. th eal for m wit h con stru ctio n
going fr l
(b) Co nst ruc t the dua l of the net wo
rk tn e ~ to uni ty for the fig ure . 0
me sh to nod e wit h nor ma lizi ng factor 'tl\
equ 1

,
I
20

lOV

(CS VT U May 2008}

[Link]
An s. No rma lizi ng fac tor : The nor ma lizi ng
factor is an arb itra ry sel ect ed fac tor
the numerical value of the dua l net wo by which
rk are rela ted to two ohm ic val ue in
net wo rk by the relation. the original

y = g; z Wh ere , g; = y
Therefore in ord er to ma inta in the pow z
er inv aria nce bet we en the ori gin al
circuit. The cur ren t source in the dua l circ and dual
uit mu st be rel ate d by the rela tion ,
ls = gn~ ⇒ Vs =~ [By Ohm's law]
gn
C = Lg n2 ⇒ L =-
C
2
gn
For constructing dua l circuit ma rk the
. . . . . . nod e in eac h £ th
out sid e the crrCUit and Jon o
ung all nod e unt il all th e 1oop and a reference node
nor ma lizi ng factor equ al to uni ty. e ele me nts are cro sse d and il
G =g;R ⇒ G= R
and

,,--------,,
,, , '
I
I
I
I
''
I
I ' \
\
I \
I I
:I 10,V - I
I
, I
\ I I
\ I I
\ I I
\ \ I
\ \
\ \ I
\ \ I
' ,, ',, 0.50 I
I

',............... :
I

- --,::±_ _
.................. - ... ... ~

~ 0
GATE ACADEMY PUBLI CATIO NS• 1 - 17 Develo pment of Circuit Concep ts

Dual circuit :
2.50

IOA t 0.5U 2U

Ques tion 18
Draw the dual of the given circuit. [CSVT U Dec 2013 (EEE)]

~Q
J\

2cos6 tV ,i!tr l!4H

joining
Ans. Mark the node in each of the loop and a reference node outsid e the circuit and
all node until all the elements are crossed. -
.,,,.,,,.,,,.------ ------ ''
.,, .,, ''
/
/
'\ \
I

I
I 3h
I
I
I
\
I
I
I I I
I
I
I

:I 2cos6t.,, ,Y t
I
I

- - - - - ~1_ _- -
4H :2
------•----
I

5J], I
I
I
I

I / ' I
\
\
I
I
'I I
I
I

I I
\ I /
\ \ /
\ ' /
.,, /
/

'' ', .,,,.,,,"✓ ,,.,,

',.........
', .... ....

Dual netwo rk :
4F 2

2cos6t A t 3U 3H SU

0
 GATE ACADEMY PUBLICA. I
~=
E~le=ctri
~~·=
c~C~[Link]
·=~w ~·!:!::-::-::-:
ts :-::-::-::-::-::-::-::--:::--:::--:::--:::--=:--=:-~1::::-~1::8~::::::::::::::::.::..::.-::..::..::.::.:::..:::..:::..=-=-=--=--=-::_
::: :~
Que stio n 19 2014
Draw the dual of the network given below. [CSV TU May (EE), l0o7i
30
6fl
IH
2F
5F 7H
40

Ans . Mark the node in each of the loop and a reference node
outs ide circu it and joinin .
node until all the elements are crossed.
------- --- --- g~,

3I
--------
--- - - -- I
/
/

~5 I
I

'I

I
I
I
I
\

''

Dua l netw ork :

SH lF
1 4U 3 4 5
7F
lOA t 2H
60 + 15V 3U

Que stio n 20
Draw the dual of the network sh . . figur
.
own in e
lOmH

120 20µF
2H
20n
X

+ y
120V
3µF +
1s n t SA 4on v;>:
GATE ACADEMY PUBLICATIO NS* 1 -19 Development of Circuit Concepts

Ans. Mark the node in each of the loop and a reference node out side the circuit and joining
all node until all elements are crossed.

-------- ''
'' ''
'
'' ''\
\ \

' \

'' I
I
I
I
I I
\ I I I
I
I
\ X ~4
I
I
I I
I
I
I
I I
\ ---- ---1'. 1---- : + I I

-------...---y ----- I ----•---TL: 40Q I

I
I
I
l',, ----JW---------- 5A 3 x
''
'I
I
I I
I

15 n~ ---------/2 I

I
I
I
I
I
I
I

I I
I I
I I
I I
I /

-- --
/ /
/ /
,,,,"
---- ---
---

Dual network :
20U
3µH
15 U
5V 2F
2 4 5
s.c.

t 12 U 40U 20µH lOmF

120A

Question 21
Draw the exact dual of circuit given below including variables.

tllµF
+
vs - :I
v; ...
-
r--,.
!i(I)
4µF
::: ;::::2 µF

Ans. Mark the node in each of the loop and a reference node outside the circuit and joining
all node until all the elements are crossed.
 1 - 20 GATE ACADEMY PUBIJCATJONS •
Electric Circuits

, JµF
'' \
\
,,

I
,
✓ --
.-
✓ 2
\

'\
I
I I
I
I
4µF I
\

''
''

Dual network :

2µH

Questio n 22

Draw the exact dual of the circuit shown in figure

2H

lH

30 40 50

lOe-21 V .:!,: . 6F 7F 8F

Ans. Mark the node in each of the loop and a reference node outside the circuit and joining
all the node until all the elements are crossed.
0 .ATE ACADEMY PUBLI CATIONS • 1 - 21 Development of Circuit Concepts
----- -- ---
-- --..z H
''
'
IH , - --- ------ --~.s
\
\

' \
\

\ sn
I
I I
I
I
I I
' I
I
I
I
I
I
'
I
I
'
I

V t- -- --- ...... __ _ 6F 7f ___ _•- --- 8F

I I 1
I IOe-2' - --
--- .... ---I
I
, I 3 '\
, I 2 \
I
I I
I I
\ I
\
''
;'., , , .,
/

' , ,- ----------- ---------

/

'

Dual network :
3U

4U lF
2 7H

2F

Question 23
Draw the dual network for the given network shown in figure
5H 5F

20 V ! 2Q IQ

[CSVTU Dec 2015 (EE), 2012)

 I
1 _22 GATE ACADEMY PUBLICATio~s
Electric Circuits -...!
.
Ans. Mark the node m each o f the Ioop and a reference node outside the circuit and join;_
-lll1g
all the node until all elements are crossed.
,, SF ,, '
,, '
'
I
I
'
\
I \
I I I
I I
20V 2n ,I __ _ IO I

'' I
-- - -----t' -- --- ------'2- '' I
I
I

'
\ I I
I I

'
' I
I
I
I

'' '' , I
, I
I

' '' ,, ,, ,
,,

Dual network :
I 20 2

20A t SF SH IU

Questio n 24
Draw the dual of the network shown in figure below,

! IC
----- -f + - - - -
/
[CSVTU May 2015 (EE), Dec 2015 (EEE)]
Sol. Make the node in each of the loop and a reference node outside the circuit and joining
all node until all the elements are crossed.

/..-··· ·-..__ 1 2 ..------- "£i·· --. __

x··: ···>)'...: .:.::.··· . c;.. ··1···· ... ·\ . .....\

' . '
\ .____ \ RI L;-·------l-·/Ri } ./
··--... ·-. ·-... _ ....._-~ ~ t------1 __ ./ ____.:
·-. .. ._.:· I
.::.- .--.:·:•~ --- -=== ·······. ·:
GATE ACADEMY PUBLICATIONS• 1-23 Development of Circuit Concept.
Dual circuit:

/ t S.C. + V

Question 25
Draw the dual network of network shown in figure. [CSVTU May 2015(EEE)]

Ki ~
2

Sol. Mark the node in each of the loop and a reference node outside the circuit and joining
all the nodes until all the elements are crossed.

~ .-······---... _

: V
C : 3 ..-··
1
:.•···· .. L ...•.<.. . _2
· ·--. _

, ,
 1 - 24 GATE ACADE MY PUBLICATioNs,
-
Electric Circuit& ~

Dual circuit :

+V

Questi on 26 : ,

Obtain the dual circuit for the given figure: rcsvrt.t~ay 2oi6<EE)1
~ .. , , . ..,,/? ,'.; ~-:.~~ . ,,

SH

lOV + · 2F 20.Q f 3A

Sol. Mark the node in each of the loop and a reference node outside the circuit and joining
all the node until all element s are crossed .
...--·················· ···············........ 5H
,,,'
/

1:·.·.·.·.·.·.·.·.·.·.·.·.·,.

.
ov.__ ~- ........................ ..?~.....L........... .~.?..~.............. .t 3A
( I 2 3 ·.)

· -. . _: ~: : : : : : : : : . . . . . . . . -±. . . . . . . . . . . . . . . . /
Dual network :
1 2H 2 1/200 3

lOA t 5F + 3V

0
GATE ACADEMY PUBLICATION S• 1-25 Development of Circuit Concept.a

Question 27
Find the duel of the network shown in figure below, [CSVTU May 2016(EEE)]
20

l0V

250

Sol. Mark the node in each of the loop and a reference node outside circuit and joining all
node until all the elements are crossed.
···· ······•... 2n
...... ······ ... ··. 2
/ ..::-...........
:· 8A ·• ... I ··· _ )0V
·-...
40
... ..
: ,· ·-.:··· _

\. :,:' ·.._ ·-.,.,,•····

.. --· 3
-.. \ 2s n····························

. ...: : : :·.:·: : : : : : : : : : : : ",,,f. . . . .. . . . . . . . . . . . .

-
Dual network :
250

l0A
SU 2
➔
1 3

8V + 2U 4U