Ect322 M4
Ect322 M4
1
INVERTERS
DC to AC converters are known as inverters.
An inverter changes a DC input voltage to a symmetrical AC output voltage of desired
magnitude and frequency. The output voltage can have a fixed or variable frequency.
Note: For AC, average value is zero (need not be sine wave)
Applications : Variable speed ac motor drives, induction heating, standby power supply,
UPS Inverters are mainly classified as: i) current source inverter and ii) voltage source
inverter CURRENT SOURCE INVERTER (CSI)
This type of inverter is fed by a current source with high internal impedance. (A DC
source in series with a large inductance will act as a current source). Input current can not
change instantaneously. CSI is used in very high power DC drives.
VOLTAGE SOURCE INVERTER (VSI)
This type of inverter is fed by a dc source of small internal impedance.
Voltage source inverter can be classified as half-bridge and full-bridge inverter.
Also, voltage source inverters may further be classified as a) square-wave inverter and b)
pulse-width modulated (PWM) inverter.
a) Square-Wave Inverter – produces a square wave ac voltage of constant value. The
output voltage of this type of inverter can only be varied by controlling the input dc
supply voltage.
b) Pulse-Width Modulated (PWM) Inverters – the output has one or more pulses in
each half- cycle. By varying the width of these pulses, the output voltage can be
controlled. The value of the dc input voltage is essentially constant in PWM-VSI.
VOLTAGE SOURCE INVERTER
SINGLE PHASE HALF-BRIDGE INVERTER
A
D1
S1
V/2
vo +
M io - P
LOAD
S2 D2
V/2
B
S1 and S2 are two controlled power semiconductor devices (power transistor, power
MOSFET, IGBT etc) which act as switches.
R-LOAD
At ωt=0, S1 is turned ON by applying a base or gate current signal. When S1 is conducting,
load terminal P is connected to positive terminal A of dc source. Load voltage is V/2. At
ωt=180°, base or gate signal is removed from S 1 and it is turned OFF. At the same time, the
gate signal is given to S 2 and it is turned ON. When S2 is conducting, load terminal P is
connected to negative terminal B of dc source. Load voltage is –V/2.
Hence, by closing S1 and S2 alternately for half of time periods, a square-wave ac voltage is
obtained at the output.
Since conduction period of any switch is equal to duration of its base/gate current, frequency
of the load voltage is controlled by control signal of the inverter.
5
1
For a pure resistive load, io and vo will be in phase and of same wave shape. For pure
resistive load, the diodes D1 and D2 do not play any role.
ig1
π 2π 3π 4π 5π xt
ig2
xt
vo
V/2
xt
-V /2
A vo
V/2
D1 io
S1
V/2
t1 t3
vo +
M io - P t4 t
LOAD t2
-V/2
S2 D2
V/2
B T1 T2
D1 D2
P
D2
-V
RL load
Mode 1
At t=t1; S1 & S2 are turned ON. vo = +V; io starts increasing from zero. io reaches
maximum at t2.
MODE 1 (t1< t < t2) MODE 2 (t2< t < t3)
S1
D3
vo vo
A B A B
LOAD LOAD
io + - io - +
V V
S2
D4
Mode 2
At t=t2; S1 & S2 are turned OFF. io starts decreasing. Stored energy in the inductance is
fed back to source through D3 and D4. vo = -V.
Mode 3
At t=t3; load current becomes zero; S3 & S4 are turned ON; io flows in negative direction.
vo = -V;
S3 D1
A vo B A vo B
LOAD LOAD
io - + io + -
V V
S4 D2
-V
D1D2 S1S2 D3D4 S3S4 D1D2
Note :
a) If output voltage is vo=+V, load current is linearly increasing and if output
voltage is vo=-V,
T/2 T
t
-V
V 2 –V 2
o 1
Total Harmonic Distortion, = 0.4843
THD = V1
Note : RMS value of fundamental, 3rd, 5th , 7th and 9th harmonics output voltages are respectively
V1=0.9V , V3=0.9V, V1=0.3V, V5=0.18V, V7=0.13V, V9=0.1V.
D1 D3 D5
S1 S3 S5
A B C
V
S4 D4 D6 S2 D2
S6
180° CONDUCTION
In 180° conduction scheme, each device conducts for 180°. They are turned ON at regular
interval of 60° in the sequence T1, T2, T3, T4, T5 and T6. The output terminals A,B and C of
this bridge are connected to the terminals of a 3-phase star or delta connected load. For a star-
connected balanced load, the operation is explained below.
During the period 0° to 60°, T 1, T5 and T6 are conducting. Load terminals A & C are
connected to positive terminal of the source and load terminal B is connected to negative
terminal of the source. Equivalent circuit is shown below. Resistance between positive
terminal and neutral is R/2 and between negative terminal and neutral is R.
IG
π/3 2π 3 π 4π 3 3 xt
1 / / 5π/
2π
xt
IG
2 xt
IG xt
3 xt
IG xt
VAN 2V/3
V/3
xt
-V/3
2V/3 -2V/3
VBN
V/3
xt
-V/3
VCN -2V/3
2V/3
V/3
xt
-V/3
VAB -2V/3
V
xt
-V
V
BC
V
xt
-V
VCA
V
xt
-V
120° CONDUCTION
In 120° conduction scheme, each device conducts for 120°. It is preferable for a delta connected
load because it provides a six step waveform across any phase. As each device conducts for
120°, only two devices are in conduction state at any instant.
During the period 0° to 60°, T 1 and T6 are conducting. Load terminals A is connected to
positive terminal and load terminal B is connected to negative terminal of the source. Load
terminal C is in floating state. Equivalent circuit is shown below.
+
A
+ A
V/2
R R
V
C
B
C V/2
R
- B
-
V ; V
V =V; V =– V =–
AB BC
CA
2 2
IG1
π/3 3 π 4π 3 3 xt
IG2
2π/ / 5π/ 2π
xt
IG3
xt
IG4
xt
IG5
IG6 xt
xt
VAB V
V/2
xt
-V/2
-V
VBC
xt
VCA
xt
CA
2
A 3-phase inverter is also called 6-step inverter since the phase voltage or line
current has 6 steps per cycle.
2 2 2
2π π –δ δ
RMS output voltage, Vs dxt
Vo = =V 2 s
π
ig2 δ
xt
ig4 π/2 π 3 /2 2
π π
xt
vo
π δ π δ xt
2 –2 2 +2
-V
By fourier analysis,
Output voltage wave has quarter-wave symmetry. [Half-wave symmetry (n is odd)
& odd symmetry (ao and an=0)].
By fourier analysis,
Output voltage wave has half-wave symmetry (n is odd) and odd symmetry (ao and
an=0)].
π +δ
4 2 4V nδ
bn = V sin nxtdxt = sin( )
π –δ nπ 2
2π 2
4V si nδ sin
Vo = dc n nxt 2
Σ n= n
1,3,
5.. π
If δ=120°, 3rd harmonics will be
absent. If δ=72°, 5th harmonics
will be absent.
Disadvantage :- Only one harmonic can be eliminated at a time.
MULTIPLE PULSE WIDTH MODULATION
Here, several pulses are used in each half-cycle of output voltage. Harmonic content
can be reduced by this method. All the pulses have same width. Gating signals are
generated by comparing a reference signal with a triangular carrier wave.
Frequency of reference signal decides the output frequency fo and the carrier
frequency fc determines the number of pulses per half-cycle. Modulation index
controls the output voltage.
Amplitude of reference signal Ar
Modulation Index = Amplitude of carrier signal Ac=
Modulation index m varies from 0 to 1.
f
Frequency Modulation ratio m = c (mf indicates the number of pulses per cycle)
f f
o
No. of pulses per second = fc
No. of pulses per half cycle = p = f To = fc
c
2 2 fo
π δ
+
p 2 pδ
RMS output voltage, o = p Vdc 2 dxt = dc
V V π π –δ π
p 2
π δ
p– 2 π π +δ
When vr > vc during positive half cycle, SA and SB’ are ON and vo = Vdc. When
vr > vc during negative half cycle, SB and SA’ are ON and vo = -Vdc.
Output voltage vo can be controlled by varying the pulse width δ. Variation of δ can be
accomplished by raising or lowering the reference waveform.
Distortion factor is reduced significantly compared with that of single-pulse modulation.
But, due to larger number of switching ON and OFF processes, switching losses would
increase. With larger values of p, the amplitudes of lowest order harmonic (LOH) would
be lower, but the amplitudes of some higher order harmonics would increase. But, such
higher order harmonics can be easily filtered out by using a low pass filter.
Since the modulating or reference wave has a square shape, this PWM technique is also
called square wave PWM.
SINUSOIDAL PULSE WIDTH MODULATION
In the sinusoidal pulse-width modulation technique, the pulse width of a high-frequency
switching signal, called the carrier, is varied in accordance to the amplitude of a low-
frequency signal, called the modulating or reference signal.
Gating signals are generated by comparing a sinusoidal reference signal vsine (of
frequency fo , same as the output frequency) with a triangular carrier wave v tri of
frequency fc.
Amplitude of reference voltage Asine
Amplitude modulation ratio, m = a
Amplitudeof carrier signal = A
tri
The output voltage switches between –Vdc and +Vdc voltage levels. Hence, the name PWM
with bipolar voltage switching.
^
Peak of the fundamental output voltage, V o1 = maVdc where ma ≤ 1
Peak (RMS) value of the fundamental component of the output voltage varies linearly
with modulation index ma. 4V
(Note : Peak value of the fundamental output voltage with square wave output, ^ = dc
=1.273V )
V o1
When ma > 1, square wave operation, π
dc
π
The harmonics in the inverter output voltage waveform appear as side bands, centered around the
switching frequency and its multiples, that is, around harmonics m f, 2mf, 3mf, and so on. This general
pattern holds true for all values of ma in the range 0-1.
Vo1
ˆ
The harmonic mf should be an odd integer. Choosing m f as an odd integer results in an odd
symmetry as well as half-wave symmetry. Therefore, only odd harmonics are present and the even
harmonics are absent. Moreover, only sine terms are present.
Genergalised harmonics of output voltage vo for a large mf
^ ^
Order of harmonic V on V on
n with ma = 0.8 with ma = 1
Vdc Vdc
1 0.8 1
mf 0.82 0.6
mf±2 0.22 0.32
2mf±1 0.31 0.18
2mf±3 0.14 0.21
For example,
In a full bridge converter circuit, Vdc = 300V, ma = 0.8, mf = 39 and the fundamental
frequency fo is 47 Hz. Calculate the RMS values the fundamental output voltage and some
of the dominant frequency components in output voltage if bipolar voltage switching scheme
is used.
^
N=37 → Vdc
^
V o37 300
Vo37 = = 0.22 = 46.67V at1739Hz
2 Vdc 2
N=41 → Vdc
^
V o41 300
Vo41 = = 0.22 = 46.67V at1927Hz
2 Vdc 2
It is desirable to use as high a switching frequency as possible for eliminating the
lower order harmonics. Higher order harmonics can be easily filtered out using a low pass
filter. But, as switching frequency is inceased, switching losses may increase and hence
inverter efficiency decreases.
If ma > 1 leads to over-modulation which causes the output voltage to be a square
wave (square wave operation). With over-modulation, fundamental output voltage increases
but it causes more harmonics. Overmodulation causes the output voltage to contain many
more harmonics in the side-bands as compared with the linear range (with m a < 1). Hence,
over-modulation is normally avoided in applications requiring low distortion.
PWM WITH UNIPOLAR SWITCHING
In PWM with unipolar voltage switching, the switches in the two legs of the full-bridge
inverter is not switched simultaneously. Here, the legs A and B of the full-bridge inverter are
controlled separately by comparing vtri with vsine and –vsine respectively.
When vsine > vtri, SA is ON, vAN = Vdc
When vsine < vtri, SA’ is ON, vAN = 0
When –vsine > vtri, SB is ON, vBN = Vdc
When –vsine < vtri, SB’ is ON, vBN = 0
Output voltage, vo = vAN – vBN
In this type of PWM scheme, when a switching occurs, the output voltage changes between
zero and
+Vdc or between zero and –Vdc voltage levels. Hence, this type of PWM scheme is called
PWM with a unipolar voltage switching.
By this switching scheme, the switching frequency in output voltage is “effectively” doubled.
Lowest harmonics appear as sidebands of twice the switching frequency.
The harmonics in the inverter output appear as sidebands around 2mf , 4mf , 6mf, …
Note the harmonics at and around mf , 3mf , 5mf , … are absent, hence lower harmonic
content compared to bipolar switching.
Also, the current ripples are less with unipolar switching.
Here, in unipolar switching scheme mf is chosen to be even whereas in bipolar switching
scheme, mf is odd.
Note also only odd harmonics are present.
Von /V dc
ˆ
CURRENT SOURCE
INVERTER LOAD COMMUTATED CURRENT
SOURCE INVERTER
In the voltage source inverter (VSI), the load voltage is independent of the type of load. But in
current source inverter (CSI), the load current is independent of the load, however, the voltage
waveform depends upon the type of the load. A voltage source is converted into a current
source by connecting a large series inductor. Because of the series inductor, variation in the
source current is very slow, so current ripple is negligible.
Load commutation is possible only for a leading power factor load. A pair of thyristors are
commutated by the negative voltage across the load when other pair of thyristors are turned
ON. In case of R or RL loads, a capacitor is connected in parallel across the load.
Initially capacitor C is charged with left plate negative while T3 and T4 are conducting. When
T1 and T2 are turned ON, constant current flows through T1, parallel combination of R &
C and T2. T3 and T4 are turned OFF due to reverse voltage by capacitor. Voltage across the
capacitor decreases to zero and then increases exponentially with reverse polarity (left plate
positive). Load voltage vo is same as the capacitor voltage. Input voltage, vin = vo.
When T3 & T4 are turned ON, T1 & T2 are commutated due to reverse voltage by capacitors.
Constant current flows through T3, parallel combination of R & C and T4. Input voltage, vin
=-vo.