PSPICE Tutorial
Prof. Ramesha C K
Introduction
• SPICE (Simulation Program for Integrated Circuits
Emphasis) is a general purpose analog circuit simulator that is
used to verify circuit designs and to predict the circuit
behavior.
• PSpice is a PC version of SPICE and HSpice is a version that
runs on workstations and larger computers.
• PSpice has analog and digital libraries of standard
components (such as NAND, NOR, flip-flops, and other
digital gates, op amps, etc) which makes it a useful tool
for a wide range of analog and digital applications.
Types of Analysis
• Non-linear DC analysis
• Non-linear transient analysis
• Linear AC Analysis
• Noise analysis
• Sensitivity analysis
• Distortion analysis
• Fourier analysis
• Monte Carlo Analysis
Circuit Components available
• Independent and dependent voltage and current sources
• Resistors
• Capacitors
• Inductors
• Mutual inductors
• Transmission lines
• Operational amplifiers
• Switches
• Diodes
• Bipolar transistors
• MOS transistors
• JFET
• MESFET
• Digital gates
Terminologies
• Subcircuit: A subcircuit allows you to define a collection of
elements as a subcircuit (e.g. an operational amplifier) and to
insert this description into the overall circuit.
• EDIF: Electronic Design Interchange Format, a standard
published by EIA. Usually used for netlists.
File structure PSPICE (Capture)
• Input file for PSpice that has the file type “.CIR”
• When a circuit is simulated “.OUT” is generated
• “*.DAT” file is by default a binary file to see the data
• “*.LIB” files where the details of complex parts are
saved
• Additional files
– *.SCH (the schematic data, itself)
– *.ALS (alias files)
– *.NET (network connection files)
Libraries
• These are files that contain reusable part data.
• They can be custom or default ones
• Some of the libraries available in the Evaluation version
of PSPICE are:
– [Link] for special functions like square root and multipliers
– [Link] for analog components like resistors and capacitors
– [Link] for pots
– [Link], .plb for connectors
– [Link], .plb for semiconductor, digital devices, switches
– [Link] for grounds, high/low digital ports
– [Link] for ammeters, viewpoints
– [Link] for various analog and digital sources
Parts
• Part is a basic building block which may represent
– One or more physical element
– Function
– Simulation model
– When a part is placed for first time its entry is
done in “Design Cache”
What is “Design Cache”????... Go and Find Out Yourself ☺
Component values may be designated with the following suffixes:
k, K = 103 “kilo”
m, M = 10-3 “milli” [Note: Since PSpice
is case insensitive,
meg, MEG = 106 “mega” “M”, designates “milli” not
“mega”]
u, U = 10-6 “micro”
g, G = 109 “giga”
n, N = 10-9 “nano”
t, T = 1012 “tera”
p, P = 10-12 “pico”
SPICE Input File Syntax
• The first line in the input file is a comment, and the
last line of the file is the statement .END
• The SPICE program consists of three parts:
• Data Statement: describes the circuit to simulate
• Control Statement: tells SPICE what type of analysis
to perform
• Output statement; specifies the output to be displayed
• The input file consists of the netlist, that is the first part
describing the circuit. Control and output display is
performed interactively after the circuit is processed.
A general description of the input file.
• The first line is the title of the circuit. It will be displayed
with the results.
• Any line starts with (*) is a comment line, will be ignored
by the simulator
• Any line starts with (+) is a continuation line. That means it
is a part (continuation) of the previous line.
• Control and command lines starts with a (.).
Netlist
All nodes must have labels (positive integer is compatible with all versions of SPICE).
There must be a ground node (node 0).
All circuit elements must have a text label; the first letter of the label specifies the type
of the circuit element.
Here is a partial list
V Independent voltage source
I Independent current source
R Resistor
C Capacitor
L Inductor
D Diode
E Voltage controlled voltage source
G Voltage controlled current source
H Current controlled voltage source
F Current controlled current source
Each element is described by the element name, the two nodes it
is connected to, and value.
Example:
RES1 1 0 3500
This is a resistor labelled RES1 connected between nodes 1 and 0
and have a value of 3500 ohms.
The value could be written as 3500, 3.5E3 3.5K 0.0035M, etc.
Capacitors (C ) and Inductors (L)
Cname N1 N2 Value <IC>
Lname N1 N2 Value <IC>
Examples:
C1 3 4 35E-12 5
L1 4 5 20E-3 1E-3
Sinusoidal Sources
Vname N1 N2 SIN( V0 VA FREQ TD THETA PHASE)
If TD, THETA and PHASE are not specified, then they are
assumed to be zero.
Example: VS 1 2 SIN(5 10 0.2 0.1)
V1 3 4 SIN(0 10 50K)
Piecewise Linear Source (PWL)
Vname N1 N2 PWL(T1 V1 T2 V2 T3 V3 ……)
in which (Ti Vi) specifies the value Vi of the source at time Ti.
V1 1 2 PWL(0 0 10U 5 100U 5 110U 0)
Pulse
Vname N1 N2 PULSE( V1 V2 TD Tr Tf PW Period)
Independent Constant Voltage Sources :
The specification for an independent constant (dc) voltage source has the format:
VNAME N+ N- DC VALUE
Ex: V1 1 0 DC 6
Independent Constant Current Sources:
INAME N+ N- DC VALUE
Ex: I1 1 0 DC 6
Voltage Dependent Voltage Source:
ENAME N+ N- NC+ NC- VALUE
Ex: E 0 3 2 0 10
Dependent Sources
Command or Control Statements to
specify the type of Analysis
1 .OP Statement
This statement instructs PSPICE to compute the dc operating point
2 .DC Statement
This statement allows to increment (sweep) an independent source over a certain range
with specified step. The format is as follows:1
.DC SRCname START STOP STEP
Example: .DC V1 0 20 2
One can nest the DC sweep command which is used to plot the transistor characterstics.
.DC SRCname START STOP STEP SRCname2 START STOP STEP
Example:
.DC Vds 0 5 0.5 Vgs 0 5 1
.TRAN Statement
This statement specifies the time interval over which the transient analysis takes
place and the time intervals.
.TRAN TSTEP TSTOP <TSTART> <TMAX> <UIC>
Where the TSTEP is the printing statement (if we want N readings then
TSTEP=TSTOP/N).
TSTOP is the final time.
TSTART is the starting time(if omitted, TSTART is assumed to be zero).
UIC stands for Use Initial Condition and instructs PSPICE not to do the quiescent
operating point before beginning the transient analysis.
.IC Statement
This statement provides an alternate way to specify initial conditions of the nodes.
.IC Vnode1= value Vnode2 = value, etc.
.AC Statement
This statement is used to specify the frequency (AC) analysis. The format is as follows:
.AC LIN NP FSTART FSTOP
.AC DEC ND FSTART FSTOP
.AC OCT NO FSTART FSTOP
Example:
.AC DEC 10 1000 1E6
.LIB Statement
This statement is used to refer a library file in the circuit file. The format is
.LIB FNAME
Example:
.LIB [Link]
.PARAM Statement
This statement allows use of a parameter instead of a numerical value. The format is
.PARAM PNAME =value or {expression}
Example:
.PARAM VCC= 15V VEE=-15V
OUTPUT STATEMENTS
.PRINT and .PLOT statements
A print is a table of data points, while a plot is graphical representation. The format is
.PRINT TYPE OV1 OV2 OV3 …..
.PLOT TYPE OV1 OV2 OV3 ….
.PROBE Statement
This command generates a file, [Link], for viewing the
analysis on the computer monitor.
SPICE Diode Model Parameters
name parameter units default example
1 IS saturation current A 1.0e-14 1.0e-14
2 RS ohmic resistanc Ohm 0 10
3 N emission coefficient - 1 1.0
4 TT transit-time sec 0 0.1ns
5 CJO zero-bias junction capacitance F 0 2pF
6 VJ junction potential V 1 0.6
7 M grading coefficient - 0.5 0.5
8 EG band-gap energy eV 1.11 1.11 Si
3.0 pn
9 XTI saturation-current [Link] - 3.0
2.0 Schottky
10 KF flicker noise coefficient - 0
11 AF flicker noise exponent - 1
coefficient for forward-bias
12 FC - 0.5
depletion capacitance formula
13 BV reverse breakdown voltage V infinite 40.0
14 IBV current at breakdown voltage V 1.0e-3
TNO parameter measurement
15 deg C 27 50
M temperature
How to model an OPAMP
1. DC Linear Model
.SUBCKT OPAMP1 13 12 16 10
RID 13 12 2MEG
RO 19 16 75
EA 19 10 13 12 2E5
.ENDS
How to model an OPAMP
1. AC Linear Model
.SUBCKT OPAMP1 13 12 16 10
RID 13 12 2MEG
RO 11 16 75
EB 11 10 17 10 1
R1 19 17 10K
C1 17 10 1.5619U
EA 19 10 13 12 2E5
.ENDS
How to model an OPAMP
Using the device library like A 741:
XName Vi+ Vi- Vp+ Vp- Out Macromodel
Example:
XA 3 2 7 4 6 UA741