0% found this document useful (0 votes)
3 views2 pages

Fixed Point Multiplication: (Signed Magnitude)

The document outlines algorithms for fixed point multiplication and division, including Signed Magnitude and Booth's Algorithm for multiplication, and Restoring and Non-Restoring algorithms for division. Each algorithm is broken down into sequential steps detailing the initialization of registers, operations performed on the multiplicand and multiplier, and the final storage of results. The document provides a comprehensive overview of the processes involved in these arithmetic operations.

Uploaded by

abcd07122002
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
3 views2 pages

Fixed Point Multiplication: (Signed Magnitude)

The document outlines algorithms for fixed point multiplication and division, including Signed Magnitude and Booth's Algorithm for multiplication, and Restoring and Non-Restoring algorithms for division. Each algorithm is broken down into sequential steps detailing the initialization of registers, operations performed on the multiplicand and multiplier, and the final storage of results. The document provides a comprehensive overview of the processes involved in these arithmetic operations.

Uploaded by

abcd07122002
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Fixed Point Multiplication: (Signed Magnitude)

The multiplicand is stored in register B, and the multiplier is stored in register Q.

STEP- 1: Initially, A and flip-flop E are set to 0, and the Sequence Counter (SC) is set to n, where n is
the number of bits in the multiplier Q.

STEP- 2: The signs of B (Bs) and Q (Qs) are compared using XOR;
 if they are the same, the result is 0, otherwise, it is 1,
 Which is stored as the sign (As) of register A.

STEP- 3: The process begins by checking the least significant bit (LSB) of Q:
 if Qn = 1, then A and B are added, with the result stored in A and any carry stored in
E;
 if Qn = 0, addition is skipped. Then, a right shift is performed on E A Q, where E
moves to the MSB of A, and the LSB of A moves to the MSB of Q.

STEP- 4: The Sequence Counter is then decremented by 1.


STEP- 5: If SC = 0, the process stops, and the final product is stored in A and Q;

 Otherwise, go to Step 3.

Fixed Point Multiplication: (Booths Algorithm)

STEP- 1: The A and the extra bit Qn+1 are set to 0. The Sequence Counter (SC) is set to n,
where n is the number of bits in the multiplier.

STEP- 2: Checking Multiplier Bits:

o The last two bits, Qn and Qn+1, are inspected:


 If Qn, Qn+1 = 10, subtract the multiplicand from A (A = A - B).
 If Qn, Qn+1 = 01, add the multiplicand to A (A = A + B).
 If Qn, Qn+1 = 00 or 11, no changes are made to AC.

STEP- 3: Right Shift Operation:

o Perform an arithmetic shift right (ASHR) on A, Q, and Qn+1.


o The sign bit of A remains unchanged.

STEP- 4: Repeat Until SC = 0:

o Decrease the Sequence Counter (SC) by 1.


o If SC > 0, repeat the process from Step 2.
o If SC = 0, the final product is stored in AC and Q.
Fixed Point Division:
A Division algorithm provides a quotient and remainder when we divide two numbers. They
are generally two types Restoring Algorithm and Non- Restoring Algorithm.
Restoring Division:
Here, register Q contains quotient and register A contains remainder.
Here, n-bit Dividend is loaded in Q register and Divisor is loaded in M register.
STEP- 1: First the registers are initialized with corresponding values.
Q=Dividend M=Divisor, A=0, n=no of bits in dividend.
STEP- 2: Then contents of registers A, Q are shifted left as if they are a single unit.
STEP- 3: Then content of register M is subtracted from A and the result is stored in A.
STEP- 4: Then the most significant bit of A is checked if it is 0 then the least significant bit of
Q is set to 1, otherwise the LSB of Q is set to 0 and value of register A is restored i.e. the
value of A before the subtraction with M.
STEP- 5: The value of counter n is decremented.
STEP- 6: If the value of n becomes zero we get out of loop otherwise we repeat STEP 2.
STEP- 7: Finally, the register Q contain quotient and A contain remainder.

Non-Restoring Division:
In non restoring division, it is less complex than the restoring one because simpler operations
are involved i.e. addition and subtraction.
Here, register Q contains quotient and register A contains remainder.
Here, n-bit Dividend is loaded in Q register and Divisor is loaded in M register.
STEP- 1: First the registers are initialized with corresponding values.
Q=Dividend M=Divisor, A=0, n=no of bits in dividend.
STEP- 2: The contents of registers A, Q are shifted left as if they are a single unit.
STEP- 3: Check the Sign bit of A if it is 0 then perform A=A-M, otherwise A=A+M.
A-M = A+M’+1.
STEP- 4: Check again the sign bit of register A, if it is 0 then Q[0] = 1, otherwise Q[0]=0.
STEP- 5: Decrement the n value by 1.
STEP- 6: Check if n equals to zero, go to STEP-2 otherwise go to next step.
STEP- 7: If sign bit of A is 1 then perform A=A+M.
STEP- 8: Register Q contain quotient and a contain remainder.

You might also like