UNIT – II
Types of Processor :
There are different ways in which microprocessors are categorized. They are
• CISC( Complex Instruction Set Computers) Processors
• RISC (Reduced Instruction Set Computers) Processors
• VLIW (Very Long Instruction Word Computers) Processors
• Super Scalar Processors
Other types of specialized processors are
• General Purpose Processors(GPP)
• Special Purpose processors (SPP)
• Application Specific Integrated Circuit(ASIC)
• Digital Signal Processors(DSP)
CISC architecture means the processor with complex instructions that are difficult to create using
basic instructions. This type of architecture has an elevated cost because of advanced functions printed
on the silicon. Instructions are of variable length and may sometimes require more than one clock
cycle. Because CISC based processors can only process one instruction at a time, the processing time
is a function of the size of the instruction.
RISC processors do not have advanced functions. Programs must be translated into simple
instructions which complicates development and/or requires a more powerful processor. Such
architecture has a reduced production cost compared to CISC processors. In addition, instructions are
simple in nature and executed in just one clock cycle, which speeds up program execution when
compared to CISC processors. Finally, these processors can handle multiple instructions
simultaneously by processing them in parallel.
INTEL 8085 :
Brief details :
Intel 8085 is a 8-bit microprocessor.
It is fabricated on a single LSI(Large Scale Integration) chip and packaged in 40-pin dual-in-
line package(DIP).
It operates on 8-bit binary [Link] is, it has 8-bit data bus and its arithmetic and logic
unit(ALU) and internal registers use 8-bits.
The 8085 system has 16-bit address bus and hence it can address any one of 2 16 memory
locations.
In other words, 8085 can access(216 = 65,536) 64 KB of memory. Each memory location can
store 8-bits.
A 16-bit word has to be stored in two consecutive memory locations.
The Intel 8085 requires a single +5V power supply.
The 8085 has in-built clock generation, system control and interrupt security.
Its clock speed is about 3 MHz.
The data bus of 8085 can be transmitted in parallel from or to the microprocessor.
The 8 Most Significant Bits(MSBs) of the address are transmitted by the address bus(pin A 15
to A8).The Least Significant Bits(LSBs) of the address are transmitted by address/data bus(pin
AD7 to AD0). The address/data bus transmits data and address at different moments. At a
particular moment it transmits either data or address. Hence, the address/data bus of 8085 is
said to be multiplexed.
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The multiplexing of address/data bus allows for extra control signals.
It has one non-maskable and three maskable interrupts.
It provides Serial Input Data (SID) and Serial Output Data(SOD) lines for serial interface.
It has an inbuilt clock oscillator circuit and requires externally only a crystal.
The frequency of the crystal is internally divided by 2.
Intel 8085 Architecture:
TRAP RST7.5 RST6.5 RST5.5 INTR INTA SID SOD
Interrupt Control Serial I/O
8-BIT INTERNAL DATA BUS
Accumulator Temporary Flag Instruction B C
Register Register Register D E
H L
Stack
Pointer(SP)
Program
ALU Instruction Counter (PC)
Decoder Incrementer/
Decrementer
X1 RESET IN
X2 TIMING AND CONTROL UNIT ADDRESS ADDRESS/
BUFFER DATA
+5V RESET OUT
BUFFER
GND
A15 –A8 AD0-AD7
CLOCK READY RD WR ALE S0 S1 IO/M HOLD HLDA
OUT
The Internal architecture of microprocessor 8085 is shown in the above fig. It includes the following
units.
1. Register Array
2. ALU and associated circuitry
3. Instruction Register and Decoder
4. Timing and Control Unit
5. Interrupts and Serial I/O
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1. REGISTER ARRAY
The 8085 has six general purpose registers and named as B, C, D, E, H and L. Each register can
hold an 8-bit data.
The six registers can also combine as register pair BC, DE and HL. A register pair can hold a 16-
bit data or a 16-bit address. The combination of two 8-bit register pairs is called a register pair.
When used as an 8-bit register, each register can store a data ranging from 00 H to FFH (0 to 255).
As a register pair, they can store a data ranging from 0000H to FFFFH (0 to 65,635). Since the
registers are used for temporary storage of data, these registers are also sometimes called as
‘scratch pads’.
The instruction set of 8085 contains a number of instructions to move a data from one register to
another register. For example, the instruction MOV B, A moves the contents of A register to B
register.
Of the register pairs, HL pair has some special functions. For example, the HL pair is used to
address memories or HL pair acts as a memory pointer.
If HL = 2050H and B = 36H, then the instruction MOV M, B transfers the contents of B(36 H) to a
memory location whose address is 2050H, available in HL register pair. Also, 16-bit addition
instructions (like DAD B) require the use of HL pair.
Program Counter: (PC)
The program counter is a 16-bit register. The PC holds the 16-bit address of the memory from
which the next byte is to be fetched. In other words, the program counter holds the address of the
next instruction. The byte may correspond to an opcode (machine code or binary code) of an
instruction or simply an 8-bit. When a byte is being fetched, the program counter is automatically
incremented by one to point to the next memory location. The CPU fetches an instruction from the
memory, executes it and increments the content of the program counter. Thus, in the next
instruction cycle it will fetch the next instruction of the program. Instructions are executed
sequentially unless an instruction changes the content of the program counter.
Stack Pointer: (SP)
The stack pointer is also a 16-bit register. It holds the address of the stack top. A stack is a group
of memory locations in RAM defined by the programmer. The stack is used to save the contents of
the registers and during interrupts and subroutine calls. There are instructions which allow storage
of data in the memory stack and its retrieval. A stack is a Last-In-First-Out(LIFO) memory in the
sense that items that go in last will come out first. Whenever something is added to the stack, the
stack pointer is decremented. Whenever something is removed from the stack, the stack pointer is
incremented. Hence, the SP always points to the top of the stack.
Address Latch – Incrementer/Decrementer:
The address latch is useful in selecting the address of the memory to be sent out from program
counter or stack pointer or any of the register pairs. An incrementer and decrementer allow the
contents of the 16-bit registers which hold the address to be incremented or decremented.
The higher order address A8 to A15 is sent out through an address buffer. The lower order address
A0 to A7 and data D0 to D7 are multiplexed and sent out through an address/data buffer as AD 0 to
AD7.
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2. ALU AND ASSOCIATED CIRCUITRY
ALU :
The ALU performs arithmetic and logical operations on two 8-bit data. The ALU combines with a
special register called the accumulator, a temporary register and five flag flip-flops to carry out the
arithmetic and logic functions.
Arithmetic operations like addition, subtraction, etc., and logical operations like AND, OR and EX-
OR, etc., performed here. It also perform increment, decrement, complement, compare, etc.
operations.
Accumulator:
The accumulator is a special 8-bit register. This register is used to store 8-bit data as well as to
perform arithmetic and logic operations. This register is identified as A. While performing arithmetic
operation like addition, one of the operand is automatically assumed to be in A register. Also, the
result of the addition is placed in A register. For example, the instruction ADD B adds the contents of
A register and B register and sends the result to A register.
If (A) = 25H and (B) = 37H then the instruction ADD B, adds 25H and 37H and the result 5CH in the
accumulator. After execution of this instruction, the contents of A is changed but the contents of B is
not affected.
i.e.(A)= 5CH and (B) =37H
Data flow between different register takes place using an internal data bus within the chip.
The accumulator is also used during I/O operations which use IN and OUT instructions.
Temporary Register:
The temporary register simply receives one of the operands from the internal data bus and sends it to
the ALU. The other operand is received from the accumulator and the required arithmetic or logic
operation is carried out. In the example, ADD B, the contents of A register directly goes to ALU but
the contents of B register is first sent to the temporary register and then to the ALU.
Flag Flip-flops:
There are five flip-flops that are set or reset after each arithmetic or logic operation. The different flags
are
(i) Carry flag – CY
(ii) Zero flag – Z
(iii) Parity flat - P
(iv) Sign flag – S
(v) Auxiliary Carry flat – AC
(i) Carry flag – CY
The carry flag is set to 1 if a carry is produced by an arithmetic or logic operation and reset to 0
for no carry. For example, if an instruction adds two numbers and if the result is less than FF , then
no carry is produced and the CY flag is reset to 0. On the other hand, if the result exceeds FF , then
a carry is produced and the CY flag is set to 1. The carry flag also serves as a borrow flag during
subtraction operation when a bigger number is subtracted from a smaller number and during some
compare operation.
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(ii) Zero flag - Z
The zero flag is set to 1 if the result of an arithmetic or a logic operation is zero and reset to 0 if
the result is non-zero. For example, if A register and B register have the same data, and if we
perform SUB B operation, the result is zero which is placed in the accumulator. Now the zero flag
is set to 1. When the data in A and B registers are not equal, after SUB B operation, the result in
the accumulator is not zero and hence the zero flag Z is reset to 0.
(iii) Parity flag – P
Parity is used to indicate the number of 1’s in a given byte. The byte is said to have ‘even parity’
if the byte has even number of 1’s and the byte is said to have ‘odd parity’ if the byte has odd
number of 1’s. The parity flag is set to 1 if the data in the accumulator has even parity and reset to
0 if the data in the accumulator has an odd parity. The parity flag is useful for error checking
during serial communication.
(iv) Sign flag- S
The sign flag is used when working with 8-bit signed numbers. When we are using signed
numbers, the most significant bit (MSB) D is used as a sign bit. If D bit is 0, then the number is
taken as a positive number and if D bit is 1, the number is taken as a negative number in 2’s
complement form. In 8085, the sign flag is set to 1 if the MSB D is 1 and the sign flag is reset to 0
if the MSB D is 0.
(v) Auxiliary Carry –AC
The auxiliary flag is set to 1, when a carry is generated at digit D3 position and passed on to digit
D4. This flag is used only internally for BCD operations and not available for the programmer.
That is, the programmer cannot use the auxiliary carry flag condition to change the sequence of the
program.
The relative position of different flags in an 8-bit flag register is shown in the below fig.
D D D D D D D D
Bit position in Flag register
Example :
Assume (A) =79H and (B) =68H. After executing ADD B instruction, what will be the content of A
register and status of the flags? What will be the content of the flag register?
The instruction ADD B adds the contents of A and B registers and places the result in A register.
(A) = 79 = 0111 1001
(B) = 68 = 0110 1000
---------------------------------------
(A) = E1 = 1110 0001
----------------------------------------
The result in the accumulator is E1H
The result is less than FFH. Therefore the sign flag is set. The sign flag is used only with signed
numbers. For unsigned numbers, as in this example, sign flag need not be used.
The result is not zero. Hence, the zero flag is not set.
The result has even parity. So the parity flag is set.
During the addition, a carry is generated at position D and passed to D. Therefore the auxiliary
carry flag is set.
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The flag register bit position is as shown.
D D D D D D D D
Assuming X=0, the flag register will have the bit values as
D D D D D D D D
The content of the flag register is 94H(if we take X = , the content of the flag register is BEH).
3. INSTRUCTION REGISTER AND DECODER
A microcomputer executes a program by first loading the machine codes of the instruction in
successive locations of memory and then executing the instructions one by one. The 8085(CPU) sends
the address of the memory location which holds the machine code of the instruction. The 8085 uses its
16-bit address bus for this. Next, the 8085 send out a control signal called memory read, to the
memory. The content of the memory, which happens to be the machine code of an instruction, now
falls on the data bus and reaches the processor. In 8085, whenever it receives the machine code of an
instruction, the machine code directly goes to the instruction register through the internal data bus.
This cycle of operation is usually referred to as OPCODE FETCH cycle.
The machine code of the instruction is now transferred to the next section named as instruction
decoder. Some of 8085 instructions are completed in just one machine cycle, namely opcode fetch.
Some instructions require two machine cycles, namely an opcode fetch followed by memory read.
Few other instructions take three or four machine cycles. In this block, named instruction decoder, the
instructions are understood (decoded) and the total number of machine cycles required is decided.
4. TIMING AND CONTROL UNIT
The instruction is decoded and necessary information is passed on to the timing and control unit of
8085.
Depending on the instruction, timing and control unit generates the required timing and control signals
for executing the instructions. The following signals are associated with this block.
Control - RD, WR
Status - S1 ,S0, IO/M
DMA - HOLD (input), HLDA(output)
RESET - RESET IN (input), RESET OUT(output)
The READY pin which is used to introduce ‘wait’ states is connected to this block. Also, by using an
external crystal, high frequency clock pulses are produced. The crystal frequency is divided by two
and used as system clock/ The clock is also sent out through the pin ‘CLOCK OUT’ for use with
peripheral devices. Also, the timing and control circuits control all the other circuits inside 8085.
5. INTERRUPTS AND SERIAL I/O
The 8085 microprocessor can be interrupted by any one of five interrupt input pin namely INTR, RST
5.5, RST 6.5, RST 7.5 and TRAP. These are interrupt pins. When an interrupt is recognized, the next
instruction is executed from a fixed location in the memory. RST 7.5, RST 6.5 and RST 5.5 are the
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restart interrupts. These interrupts are maskable interrupts. TRAP is a non-maskable interrupt. It is
unaffected by any mask or interrupt enable. The order of priority of interrupts is as follows.
TRAP – Highest Priority
RST 7.5, RST 6.5, RST 5.5 - Lowest priority
INTR is an interrupt request signal. Among interrupts it has the lowest priority. An interrupt is used by
I/O devices to transfer data to the microprocessor without wasting its time. INTA is an interrupt
acknowledge signal sent by the microprocessor after INTR is received.
Normally a CPU communicates with the peripherals using the data bus where data flows in or out in
parallel. But for specific purposes, data transfer can also take place in serial form. Two pins SID and
SOD are used for this purpose. Serial I/O is also done using a serial communication device 8251.