Chapter 1 Notes
Chapter 1 Notes
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[Link] the CPU faster yields diminishing returns when the bus remains the
system's critical bottleneck.
[Link] hierarchy exploits the trade-off between speed, size, and cost: faster
memory is exponentially more expensive.
[Link] memory bridges the speed gap between CPU registers and main
memory through temporal and spatial locality principles.
M
[Link] is faster but costlier than DRAM because SRAM requires no
K refreshing.
[Link] is volatile "working space"; ROM is non-volatile "permanent
instruction" storage.
P
[Link] memory, a specialized EEPROM, revolutionized storage by enabling
R block-level electrical rewriting.
E [Link]'s supremacy in computing stems from electricity's binary nature: ON
P (1) and OFF (0).
[Link] serves as human-readable binary shorthand: four binary digits
A compress into one hex digit.
R [Link]'s complement representation elegantly solves the negative number
A problem by using the leftmost bit as the sign bit.
[Link] two's complement, there is exactly one more negative number than
T positive numbers in any given bit-width.
I [Link]'s 32-value gap between uppercase and lowercase (65→97) is
O computationally efficient as 2⁵.
N [Link] difference between 'A' (65) and 'a' (97) is exactly 32—one bit-flip in
binary representation.
S [Link] operating system is the master software that transforms raw hardware
into a usable computing platform.
26.A program is static code on disk; a process is that code dynamically
executed in memory.
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[Link] scheduling solves the fundamental problem of sharing a single CPU
among multiple competing processes.
[Link]-robin scheduling ensures fairness by allocating fixed time slices to
each process in circular order.
[Link] eliminates external fragmentation by dividing programs into fixed-
size pages mapped into arbitrary memory frames.
M
[Link] memory illusionarily extends RAM by using disk space as secondary
K memory through paging.
[Link] occurs when the system spends more time swapping pages
between memory and disk than executing instructions.
P
[Link] (Direct Memory Access) liberates the CPU from I/O tasks by allowing
R devices to transfer data directly to memory.
E [Link] wastes CPU cycles by constantly checking device status; interrupts
P notify the CPU only when needed.
[Link] emphasizes hardware complexity with multi-step instructions; RISC
A relies on compiler optimization with simple, fixed-length instructions.
R [Link] CISC processors internally convert complex instructions into RISC-
A like micro-operations.
[Link] hit ratio directly determines system performance; modern systems
T achieve 95%+ hit rates.
I [Link]'s Law fundamentally proves that sequential code portions impose an
O insurmountable ceiling on parallel speedup.
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[Link] prioritize raw computational power; mainframes prioritize
reliability and concurrent user support.
[Link] ENIAC (1946) was the first electronic computer; the EDVAC (1949)
introduced the stored-program concept.
[Link] computer generation brought smaller, faster, cheaper, and more
reliable systems through technological leaps.
M
[Link] gates are the atomic building blocks of all digital circuits,
K implementing Boolean functions.
[Link] Morgan's Laws provide the mathematical foundation for circuit
simplification and gate conversion.
P
[Link] circuits produce outputs solely from current inputs;
R sequential circuits incorporate past states through memory.
E [Link]-flops are the fundamental 1-bit memory cells enabling registers,
P counters, and all sequential logic.
[Link] D flip-flop's output simply follows the input at each clock edge—the
A most common memory element.
R [Link] computing fundamentally shifts capital expenditure (buying servers)
A to operational expenditure (renting resources).
[Link] provides virtualized hardware; PaaS provides development platforms;
T SaaS provides ready-to-use software.
I [Link] in depth mandates security at every layer: physical, network,
O system, application, data, and user.
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[Link] Unit coordinates all CPU operations; ALU performs all
mathematical and logical calculations.
[Link] buses (data, address, control) are the communication highways
connecting all computer components.
[Link] are the fastest memory location, operating at CPU speed with
nanosecond access times.
M
[Link] revolutionized storage by eliminating mechanical movement, offering
K orders-of-magnitude faster access than HDDs.
[Link] methodology requires complete upfront planning; Agile embraces
iterative development with continuous feedback.
P
[Link]-box testing validates functionality without code visibility; white-box
R testing examines internal logical paths.
E [Link] address bus carries memory location information, not the actual data.
P [Link] control bus carries command signals synchronizing all components.
A [Link] can be erased using ultraviolet light; EEPROM uses electrical
signals.
R
[Link] memory erases data in blocks, not byte-by-byte like conventional
A EEPROM.
T [Link] uses flip-flops to store bits; DRAM uses capacitors that leak charge
requiring refresh.
I
[Link] Hard Disk Drives use spinning platters; SSDs use NAND flash
O memory chips.
N [Link] suffer from mechanical latency; SSDs have no moving parts ensuring
near-instant access.
S
[Link] binary number 11111111 in unsigned representation equals 255; in
signed two's complement equals -1.
[Link]'s complement subtraction is performed by adding the two's complement
of the subtrahend.
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[Link] in two's complement occurs when adding two positives yields a
negative or two negatives yield a positive.
[Link] was developed to overcome ASCII's limitation of representing only
128 characters.
[Link]-8, the dominant web encoding, uses variable byte lengths while
maintaining ASCII compatibility.
M
[Link] BIOS stored in ROM initializes hardware and boots the operating
K system.
[Link] is the modern replacement for BIOS, supporting larger drives and
faster booting.
P
[Link] process control block (PCB) stores all information about a specific
R process.
E [Link] switching is the mechanism of saving one process state and loading
P another.
[Link] gives the illusion of parallelism by rapidly switching processes
A on a single CPU.
R [Link] scheduling suffers from the convoy effect where short jobs wait
A behind long ones.
[Link] scheduling is provably optimal for minimizing average waiting time but
T impossible to implement perfectly.
I [Link] scheduling can cause starvation where low-priority processes never
O execute.
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[Link] divides programs into logical variable-sized segments based
on programmer's view.
[Link] divides programs into fixed-sized pages invisible to the programmer.
[Link] page table maps virtual page numbers to physical frame numbers.
[Link] Translation Lookaside Buffer (TLB) is a hardware cache for page table
M entries.
K [Link] paging loads pages only when they are actually needed, not in
advance.
[Link] fault occurs when a program accesses a page not currently in physical
P memory.
R [Link] page replacement algorithm decides which page to evict when memory
is full.
E [Link]'s anomaly proves that adding more memory can sometimes increase
P page faults in FIFO.
A [Link] working set model maintains the set of pages a process is actively using.
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100. Journaling file systems maintain a log of changes for rapid recovery
after crashes.
101. The ext4 file system, common in Linux, supports journaling and large
file sizes.
102. APFS, Apple's file system, is optimized for flash storage with copy-
on-write design.
M
103. RAID (Redundant Array of Independent Disks) combines multiple
K drives for performance or redundancy.
104. RAID 0 stripes data across drives for performance but offers no
redundancy.
P
105. RAID 1 mirrors data across drives for complete redundancy but
R doubles cost.
E 106. RAID 5 stripes with parity, offering good performance and single-
P drive fault tolerance.
107. Moore's Law observed that transistor density doubles approximately
A every two years.
R 108. Moore's Law is ending due to quantum effects at atomic scales
A limiting further miniaturization.
109. Dennard Scaling allowed smaller transistors to consume less power
T while maintaining performance.
I 110. The end of Dennard Scaling led to the multi-core era instead of faster
O single cores.
N 111. Dark silicon refers to chip portions that must remain powered off due
to thermal constraints.
S 112. Quantum computing leverages superposition and entanglement for
certain exponential speedups.
113. A qubit can represent 0, 1, or both simultaneously through
superposition.
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114. Quantum supremacy occurs when a quantum computer solves a
problem impractical for classical computers.
115. Neuromorphic computing mimics neural structures for energy-
efficient AI processing.
116. Optical computing uses light instead of electricity for potentially
faster, lower-power computation.
M
117. DNA computing uses biological molecules to perform parallel
K computations.
118. Spintronics exploits electron spin rather than charge for non-volatile,
low-power memory.
P
119. Memristors are circuit elements whose resistance depends on
R historical voltage applied.
E 120. Heterogeneous computing combines different processor types (CPU,
P GPU, FPGA) for specialized tasks.
121. GPU (Graphics Processing Unit) excels at SIMD parallel operations
A for graphics and AI.
R 122. FPGA (Field-Programmable Gate Array) can be reconfigured after
A manufacturing for custom circuits.
123. ASIC (Application-Specific Integrated Circuit) is hard-wired for a
T single task, maximizing efficiency.
I 124. Systolic arrays are specialized pipelines where data flows
O rhythmically through processing elements.
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128. Speculative execution guesses branch outcomes to keep the pipeline
full.
129. Branch prediction attempts to guess which way a conditional jump
will go.
130. Misprediction penalty is the cost of flushing incorrect speculative
work.
M
131. Out-of-order execution allows instructions to execute when ready, not
K in program order.
132. Register renaming eliminates false dependencies by mapping
architectural to physical registers.
P
133. Tomasulo's algorithm pioneered out-of-order execution with register
R renaming.
E 134. Superscalar processors issue multiple instructions per clock cycle.
P 135. Hyper-threading (Simultaneous Multithreading) allows one core to
execute multiple threads.
A
136. NUMA (Non-Uniform Memory Access) recognizes that memory
R access time depends on location.
A 137. UMA (Uniform Memory Access) provides equal memory access time
for all processors.
T
138. SMP (Symmetric Multiprocessing) has multiple identical processors
I sharing memory.
O 139. AMP (Asymmetric Multiprocessing) assigns specialized tasks to
N different processors.
140. Vector processors apply the same operation to entire arrays of data in
S one instruction.
141. Pipeline hazards (structural, data, control) stall instruction throughput.
142. Data hazards occur when instructions depend on previous results not
yet available.
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143. Control hazards arise from branches and jumps disrupting the
instruction flow.
144. Structural hazards happen when hardware resources cannot support all
concurrent operations.
145. Forwarding (bypassing) resolves data hazards by routing results
directly where needed.
M
146. Branch delay slots are instructions placed after branches that execute
K regardless of branch outcome.
147. Predicated execution conditionally executes instructions based on
boolean flags.
P
148. The clock rate determines how many cycles per second the CPU
R executes.
E 149. CPI (Cycles Per Instruction) measures average cycles needed per
P instruction.
150. MIPS (Million Instructions Per Second) and FLOPS (Floating Point
A Operations Per Second) measure performance.
R
A
T
I
O
N
S
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Practice MCQs
1. Which component of a system refers to the external factors that influence
its operation?
• A) Objective
• B) Components
M
• C) Environment
K • D) Interaction
• Answer: C
P 2. What distinguishes natural systems from artificial systems?
R • A) Natural systems are smaller in size
E • B) Natural systems require no human intervention and are self-regulating
R • Answer: B
7. The Von Neumann bottleneck refers to:
A
A) Limited CPU processing speed
T
•
R • Answer: B
11. Flash memory is technically a type of:
A
A) SRAM
T
•
• B) DRAM
I • C) EEPROM
O • D) Magnetic storage
N • Answer: C
S 12. Why do computers use the binary number system?
• A) Because humans understand binary easily
• B) Because decimal circuits are too expensive
• C) Because electricity has two states: ON (1) and OFF (0)
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• D) Because binary requires less memory
• Answer: C
13. Convert binary 1011 to decimal:
• A) 10
B) 11
M
•
• C) 12
K • D) 13
• Answer: B
P 14. Convert binary 10111010 to hexadecimal:
R • A) B9
E • B) BA
P • C) AB
A • D) 9B
R • Answer: B
15. In two's complement representation, the leftmost bit indicates:
A
A) The magnitude of the number
T
•
• C) 48
K • D) 32
• Answer: B
P 18. The ASCII code for 'a' is:
R • A) 65
E • B) 97
P • C) 48
A • D) 32
R • Answer: B
19. The numerical difference between uppercase and lowercase ASCII letters
A is:
T • A) 16
I • B) 32
O • C) 64
N • D) 128
S • Answer: B
20. An operating system is primarily:
• A) Application software for word processing
• B) System software that manages hardware and provides services for
programs
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• C) A programming language compiler
• D) A database management system
• Answer: B
21. The key difference between a program and a process is:
A) Programs are larger than processes
M
•
• B) The system spends more time swapping pages than executing instructions
K • C) The hard disk runs out of space
• D) Too many users log in simultaneously
P • Answer: B
R 26. DMA (Direct Memory Access) improves performance by:
E • A) Increasing CPU clock speed
P • B) Allowing devices to transfer data directly to memory without CPU
intervention
A
• C) Compressing data before storage
R • D) Prioritizing interrupts
A • Answer: B
T 27. In programmed I/O (polling), the CPU:
I • A) Waits for interrupts from devices
O • B) Constantly checks device status, wasting cycles
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• B) Complex instructions, variable length, hardware does more
• C) Only load/store instructions access memory
• D) Compiler does most of the work
• Answer: B
29. RISC architectures are characterized by:
M
• A) Complex, multi-step instructions
K • B) Variable instruction length
• C) Simple instructions, fixed length, compiler does more
P • D) Hardware implements complex operations
R • Answer: C
E 30. ARM processors, used in most smartphones, are based on which
architecture?
P
• A) CISC
A
• B) RISC
R • C) Von Neumann
A • D) Harvard
T • Answer: B
I 31. Cache memory exists primarily to:
O • A) Store permanent data
N • B) Bridge the speed gap between fast CPU and slower RAM
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• A) 95% of data is stored permanently
• B) 95% of memory accesses find data in cache
• C) 95% of CPU time is productive
• D) 5% of cache is unused
Answer: B
M
•
P • B) 100x
R • C) 10x
E • D) 9x
Answer: C
P •
• Answer: C
K 37. The EDVAC (1949) introduced which revolutionary concept?
• A) Vacuum tubes
P • B) Magnetic tape storage
R • C) The stored-program concept
E • D) Graphical user interface
P • Answer: C
• Answer: B
K 41. De Morgan's Laws state that (A·B)' equals:
• A) A'·B'
P • B) A' + B'
R • C) A + B
E • D) (A+B)'
P • Answer: B
• Answer: B
K 45. Asymmetric encryption (like RSA) uses:
• A) Identical keys for both operations
P • B) Public key for encryption, private key for decryption
R • C) No mathematical relationship between keys
E • D) Single shared secret key
P • Answer: B
• Answer: B
K 49. White-box testing requires:
• A) No knowledge of the code
P • B) Visibility of internal code and logical paths
R • C) Only user acceptance criteria
E • D) Automated testing tools exclusively
P • Answer: B
• Answer: C
K 53. Which type of ROM can be erased using UV light?
• A) PROM
P • B) EPROM
R • C) EEPROM
E • D) Flash
P • Answer: B
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• Answer: B
56. LRU page replacement removes:
• A) The oldest loaded page
• B) The least recently used page
C) The largest page
M
•
A • Answer: A
• D) NOR gate
K • Answer: B
61. A multiplexer (MUX) performs which function?
P • A) Converts code to active output
R • B) Selects one of many inputs to pass through
E • C) Adds two binary numbers
P • D) Stores one bit of data
A • Answer: B
A • Answer: C
R 66. In two's complement, why is there one more negative number than
positive?
A • A) Because zero is counted as positive
T • B) Because the most negative number has no positive counterpart
I • C) Due to hardware limitations
O • D) Because of rounding errors
N • Answer: B
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• D) 97
• Answer: C
68. Which is NOT a function of an operating system?
• A) Process management
B) Memory management
M
•
A • D) Newly created
R • Answer: C
70. Journaling in file systems provides:
A
A) Faster file access
T
•
• C) No inputs are 1
K • D) An odd number of inputs are 1
• Answer: B
P 73. The XOR gate produces output 1 when:
R • A) All inputs are 1
E • B) No inputs are 1
P • C) An odd number of inputs are 1
R • Answer: C
74. In Boolean algebra, A + A' equals:
A
A) A
T
•
• B) A'
I • C) 1
O • D) 0
N • Answer: C
S 75. In Boolean algebra, A · A' equals:
• A) A
• B) A'
• C) 1
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• D) 0
• Answer: D
76. Cyclomatic complexity measures:
• A) CPU clock cycles
B) Code complexity and number of paths to test
M
•
• C) Memory usage
K • D) Network bandwidth
• Answer: B
P 77. Unit testing focuses on:
R • A) Testing entire system
E • B) Testing individual components or functions
P • C) User acceptance
R • Answer: B
78. Acceptance testing is performed to:
A
A) Find syntax errors
T
•
• C) Hybrid cloud
K • D) Distributed cloud
• Answer: D
P 81. Phishing attacks involve:
R • A) Malware that encrypts files
E • B) Fake communications to steal sensitive information
P • C) Overloading servers with traffic
R • Answer: B
82. DDoS attacks aim to:
A
A) Steal passwords
T
•
• C) Data encryption
K • D) User training
• Answer: B
P 85. The last layer of defense in depth is:
R • A) Physical security
E • B) Firewalls
P • C) User training and awareness
A • D) Encryption
R • Answer: C
86. Which computer category is designed for thousands of concurrent users
A with maximum reliability?
T • A) Supercomputer
I • B) Mainframe
O • C) Minicomputer
N • D) Microcomputer
S • Answer: B
87. Supercomputers are optimized for:
• A) Transaction processing
• B) Raw computational power
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• C) User interactivity
• D) Portability
• Answer: B
88. Embedded computers are characterized by:
A) General-purpose use
M
•
A • C) Vacuum tubes
R • D) Microprocessors
Answer: C
A •
R • D) Measured in gigabytes
Answer: B
A •
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• B) Removes page that won't be used for longest time (theoretically perfect
but impossible)
• C) Removes random pages
• D) Keeps all pages in memory
• Answer: B
M 96. Which is true about RISC compared to CISC?
K • A) RISC has more complex instructions
• B) RISC has variable instruction length
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• A) Converts active input to coded output
• B) Decodes instructions
• C) Performs arithmetic
• D) Generates clock signals
Answer: A
M
•
P • B) 100x
R • C) 20x
E • D) 10x
Answer: C
P •
N • A) Direct mapped
S • B) Fully associative
• C) Set associative
• D) Sector mapping
• Answer: B
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103. Write-through cache policy means:
• A) Data written only to cache
• B) Data written to cache and memory simultaneously
• C) Data written only when cache is full
D) Data never written back to memory
M
•
• Answer: B
K 104. Write-back cache policy means:
• A) Data written to cache and memory immediately
P • B) Data written only to cache, then to memory when block is replaced
R • C) Data never written to memory
E • D) Writes bypass cache entirely
P • Answer: B
• Answer: B
K 108. RAID 1 provides:
• A) Striping for performance
P • B) Mirroring for complete redundancy
R • C) Parity for error correction
E • D) Distributed parity
P • Answer: B
R • A) 2 drives
B) 3 drives
A •
C) 4 drives
T
•
• D) 5 drives
I • Answer: B
O 110. The boot process begins with code stored in:
N • A) RAM
S • B) Hard disk
• C) ROM (BIOS/UEFI)
• D) Cache
• Answer: C
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111. Interrupts allow the CPU to:
• A) Execute instructions faster
• B) Respond to asynchronous events without polling
• C) Increase clock speed
D) Reduce memory usage
M
•
• Answer: B
K 112. An interrupt vector is:
• A) The data being transferred
P • B) A pointer to the interrupt handler routine
R • C) The interrupt priority level
E • D) The device generating the interrupt
P • Answer: B
C) User input
T
•
• D) Network packets
I • Answer: B
O 114. The deadlock condition requires four conditions: mutual exclusion, hold
N and wait, no preemption, and:
S • A) Circular wait
• B) Priority inversion
• C) Starvation
• D) Aging
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• Answer: A
115. The banker's algorithm is used for:
• A) CPU scheduling
• B) Deadlock avoidance
C) Memory allocation
M
•
A • Answer: C
B) LRU
T
•
• C) Optimal
I • D) Random
O • Answer: B
N 118. Inverted page tables save memory by:
S • A) Using smaller page sizes
• B) Having one entry per physical frame, not per virtual page
• C) Eliminating page tables entirely
• D) Storing page tables on disk
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• Answer: B
119. Segmentation with paging combines:
• A) Variable segments and fixed pages
• B) Fixed segments and variable pages
C) No memory protection
M
•
• D) Single-level addressing
K • Answer: A
120. The TLB miss rate affects performance because:
P • A) The CPU must access the page table in memory, which is slower
R • B) The process must be terminated
E • C) The cache must be flushed
P • D) The disk must be accessed
A • Answer: A
• D) No kernel
K • Answer: C
124. Mutual exclusion ensures that:
P • A) Multiple processes can enter critical section simultaneously
R • B) Only one process enters critical section at a time
E • C) Processes never wait
P • D) Deadlock is guaranteed
A • Answer: B
B) Counting semaphore
T
•
• C) Mutex
I • D) Monitor
O • Answer: B
N 126. The critical section problem requires: mutual exclusion, progress, and:
S • A) Priority inversion
• B) Bounded waiting
• C) Deadlock
• D) Starvation
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• Answer: B
127. Peterson's solution provides:
• A) Hardware-based mutual exclusion
• B) Software-based mutual exclusion for two processes
C) Deadlock prevention
M
•
• D) Memory management
K • Answer: B
128. A monitor is a high-level synchronization construct that:
P • A) Uses busy waiting
R • B) Encapsulates shared data and operations with mutual exclusion
E • C) Requires assembly language
P • D) Cannot handle condition variables
A • Answer: B
• C) Memory allocation
I • D) File system organization
O • Answer: B
N 130. Spooling allows:
S • A) Multiple processes to use a printer simultaneously by queueing output
• B) Direct memory access
• C) Faster CPU execution
• D) Reduced power consumption
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• Answer: A
131. Buffering in I/O systems:
• A) Slows down data transfer
• B) Temporarily holds data to match speed differences between devices
C) Eliminates need for interrupts
M
•
A • Answer: B
• D) Linked list
K • Answer: B
136. Unix/Linux file systems use:
P • A) FAT table
R • B) MFT
E • C) Inode structure
P • D) Linked allocation only
A • Answer: C
• D) Network bandwidth
K • Answer: B
140. The SCAN disk scheduling algorithm (elevator algorithm):
P • A) Services requests in order of arrival
R • B) Moves disk arm in one direction, servicing requests until end, then
E reverses
C) Services shortest seek time first
P •
N • Answer: B
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• D) Equal service for all
• Answer: B
143. Formatting a disk:
• A) Erases all data and prepares disk for file system use
B) Only reads disk contents
M
•
R • Answer: A
145. The boot block contains:
A
A) User files
T
•
R • Answer: A
149. The maximum file size in a file system depends on:
A
A) CPU speed only
T
•
• C) Parity only
K • D) No redundancy
• Answer: A
P 152. RAID 01 (0+1) combines:
R • A) Mirroring then striping
E • B) Striping then mirroring
P • C) Parity distributed
A • D) Single disk
R • Answer: B
153. Hot swapping allows:
A
A) CPU replacement while running
T
•
R • Answer: B
157. Distributed file systems (like NFS) allow:
A
A) Local access only
T
•
• C) Mainframes only
K • D) Embedded devices
• Answer: B
P 160. Database indexing improves:
R • A) Data security
E • B) Query performance by reducing disk access
P • C) Backup speed
A • D) Network bandwidth
R • Answer: B
161. ACID properties in databases stand for:
A
A) Availability, Consistency, Isolation, Durability
T
•
• C) Data compression
K • D) Encryption
• Answer: B
P 164. The two-phase commit protocol ensures:
R • A) Faster transactions
E • B) Atomicity in distributed transactions
P • C) Data encryption
A • D) Index maintenance
R • Answer: B
165. CAP theorem states distributed systems can have at most two of:
A Consistency, Availability, and:
T • A) Performance
I • B) Partition tolerance
O • C) Security
N • D) Scalability
S • Answer: B
166. MapReduce is a programming model for:
• A) Single-threaded applications
• B) Processing large datasets in parallel across clusters
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• C) Real-time transaction processing
• D) User interface design
• Answer: B
167. Hadoop implements:
A) Only storage
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•
A • C) Single-node storage
R • D) Real-time transactions
Answer: B
A •
A • C) Network errors
R • D) User passwords
Answer: B
A •
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• B) Labeled training data with desired outputs
• C) Only unlabeled data
• D) Reinforcement signals only
• Answer: B
179. Unsupervised learning works with:
M
• A) Labeled data only
K • B) Unlabeled data to find hidden patterns
• C) Only numerical data
P • D) Predefined categories
R • Answer: B
E 180. Reinforcement learning involves:
P • A) Labeled examples
Answer: B
T
•
R • C) Static data
D) Single predictions
A •
Answer: B
T
•
R • C) Slow training
D) Data loading
A •
Answer: B
T
•
R • C) Single numbers
D) Binary codes
A •
Answer: B
T
•
R • C) A recurrent network
D) Not pre-trained
A •
Answer: B
T
•
Answer: B
T
•
R • C) Perform regression
D) Reduce dimensionality
A •
Answer: B
T
•
R • C) Training speed
D) Model size
A •
Answer: B
T
•
Answer: B
T
•
R • C) No error checking
D) Only multicast
A •
Answer: B
T
•
A • B) 32-bit
R • C) 64-bit
D) 16-bit
A •
Answer: B
T
•
A • B) Application
R • C) Network
D) Data Link
A •
Answer: B
T
•
Answer: B
T
•
R • C) MAC addresses
D) Domain names
A •
Answer: B
T
•
N • B) Quantum states are correlated such that measuring one instantly affects
the other
S
• C) No relationship exists
• D) Classical communication is instant
• Answer: B
238. Shor's algorithm on quantum computers threatens:
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• A) Symmetric encryption only
• B) RSA and other public-key cryptography
• C) Hash functions only
• D) All encryption equally
Answer: B
M
•
• Answer: B
I 241. Biotechnology computing (bioinformatics) applies computing to:
O • A) Financial data
N • B) Biological data like DNA sequences
S • C) Weather prediction
• D) Traffic management
• Answer: B
242. Computational genomics analyzes:
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• A) Protein structures only
• B) Genome sequences and genetic data
• C) Population statistics
• D) Medical images only
Answer: B
M
•
A • A) Digital logic
D) Classical computers
T
•
• Answer: B
I 245. Spiking neural networks (SNNs) differ from traditional ANNs by:
O • A) Continuous activation
N • B) Using precise spike timing for information transmission
S • C) No learning capability
• D) Digital signals only
• Answer: B
246. Memristors are circuit elements whose resistance depends on:
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• A) Temperature only
• B) Historical voltage applied (they "remember")
• C) Light exposure
• D) Magnetic fields only
Answer: B
M
•
A • A) Silicon chips
D) Light pulses
T
•
• Answer: B
I 249. Swarm intelligence algorithms are inspired by:
O • A) Individual reasoning
N • B) Collective behavior of social insects like ants and bees
S • C) Classical physics
• D) Digital circuits
• Answer: B
250. Evolutionary algorithms use mechanisms inspired by:
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• A) Gradient descent
• B) Biological evolution: selection, mutation, crossover
• C) Backpropagation
• D) Linear regression
Answer: B
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R
A
T
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