Chapter Four

INSTRUCTION SET
❖it is the collection of all commands that the
microprocessor can understand and execute.
❖Except for string instructions, instructions do not
permit memory-memory operations.
❖Some instruction set contains instructions with
✓ No Operand ,eg HLT
✓ Single Operand eg INC AX
✓ Two Operands, eg MOV AX,BX
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An instruction in a program consists of 4 parts or fields

1. Label
2. Opcode field.
3. Operand/s field.
4. Comment field
❖ Contains a comment about an instruction or
a group of instructions.
❖ A comment always begins with a semicolon(;)
Examples:
label opcode operand/s comment
DATA DB 23H ; define DATA as a byte of
23H
START : MOV AL,BL
MOV CX,200 ; copy 200
decimal into CX. 2
The main types instructions
❖Data copy/transfer instructions
❖I/O instructions
❖Arithmetic and Logic instructions
➢BCD arithmetic instructions
➢ASCII arithmetic instructions
➢Basic Logic instructions
➢Shift and Rotate
➢String Comparisons

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 A. Data copy / transfer
Instructions
❖This type of instructions are used to transfer
data from source operand to destination
operand.
❖All the instructions used for the operations like
storing, moving, loading, exchanging, input
and output belong to this category.

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 MOV instruction
❖This data transfer instruction transfers data from
one register/memory location to another
register/memory location.
❖The source may be any one of the segment
registers, general/special purpose registers, or a
memory location and….
❖The destination may be another registers (except
code segment register), or memory locations.
❖In the case of immediate addressing mode, a
segment register can’t be a destination register.
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 Example: Load DS with 5000H

MOV DS, 5000H ; is not permitted (invalid)

❖The correct procedure is
MOV AX, 5000H
MOV DS, AX

❖The other MOV instruction examples are

given below with the corresponding addressing
modes.

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1. MOV AX, 5000H What are the addressing modes of these
2. MOV AX, BX instructions?

3. MOV AX, [BX]

4. MOV AX, [SI]
5. MOV AX, [2000H]
1. MOV AX, START
6. MOV AX, 50H [BX]
7. MOV AX, ALPHA [BX]
8. MOV AX, ALPHA [SI]
9. MOV AX, 05H [SI]
10. MOV AX, ALPHA [SI] [BX]
11. MOV AX, 05H [DI] [BX]
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1. MOV AX, 5000H ; immediate
2. MOV AX, BX ; Register
3. MOV AX, [BX] ; Register Indirect/Based
4. MOV AX, [SI] ; Register Indirect/Based
5. MOV AX, [2000H] ; Direct
1. MOV AX, START ; Direct or immediate
6. MOV AX, 50H [BX] ; Based
7. MOV AX, ALPHA [BX] ; Based
8. MOV AX, ALPHA [SI] ; Indexed
9. MOV AX, 05H [SI] ; Indexed
10. MOV AX, ALPHA [SI] [BX] ; Based indexed
11. MOV AX, 05H [DI] [BX] ; Based indexed
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MOV CX,DX Moves the 16 bit content of DX into CX.
(Register to Register) No flags are affected.
Moves the 16 bit data 3476H into a memory location specified by DS+DI.
MOV [DI],3476H
(Uses DS as the segment register).
(Immediate to Memory)
No flags are affected.
MOV SI,0F12H Moves the 16 bit data into the register SI.
(Immediate to Register) No flags are affected.

Moves the contents of memory location which is offset by START from the
MOV AX,START
current DS value into register AX. Uses DS as the segment register.
(Memory to Register)
No flags are affected.

Moves the 16 bit contents of AX to the memory location which is offset by

MOV BEGIN,AX
BEGIN plus DS value. Uses DS as the segment register.
(Register to memory)
No flags are affected.

MOV DS,CX Used for initializing DS .

(Register to Segment register) No flags are affected.

MOV CX,DS Moves the contents of segment Register

(Segment Register to Register) No flags are affected.

Moves the 16 bit word in AX with the contents of two consecutive memory
MOV START[BX],AX
locations starting at 20 bit physical address computed from START, BX and DS.
(Register to memory)
AL is moved with the content of 1st location.
AH is moved with the content of next location. 9
 Some Invalid MOV statements
1. MOV DL, CX ; Different operand sizes
2. MOV DS, 1075H ; Immediate value cannot be
moved to a segment register
3. MOV CS, DX ; Destination register cannot be CS

4. MOV ES, DS ; Both registers can’t be segment

registers
5. MOV 75H, AX ; Immediate value cannot be a
destination operand
6. MOV BEGIN, START ; Both operands cannot be
located in memory
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 XCHG instruction
❖This instruction exchanges the contents of the
specified source and destination operands,
which may be registers or one of them may be a
memory location.
❖However, data exchange between two memory
locations is not permitted.??
❖ XCHG [5000H], AX ; will exchange data
between AX and a memory
location [5000H] specified
by the DS.
❖ XCHG AX, BX ; will exchange data
between registers AX & BX 11
❖The XCHG instruction is convenient because
we don’t need a third register to hold a
temporary value in order to swap two values.
❖we need three MOV instructions
MOV CX, AX
MOV AX, DX
MOV DX, CX
to perform XCHG AX, DX

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 C. I/O Instructions
❖This instructions are used for reading/writing an
input/output port.
❖The address of the input/output port may be
specified in the instruction directly or indirectly.
❖AL and AX are the allowed destinations for 8 and
16-bit input operations.
❖For the output operations, the contents of AX and
AL are transferred to a directly / indirectly
addressed port.

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❖DX is the only register (implicit) which is
allowed to carry the port addresses.
For Example:

IN AX ; This instruction reads data from a 16-bit

port whose address is in DX (implicit) and
stores it in AX.
OUT AX ; This sends data available in AX to a port
whose address is specified implicitly in DX.

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IN AL,38H
Inputs 8-bit data from port 38H into AL.
Immediate (Port) to 8-bit Register.
IN AX,38H
Inputs 16-bit data from port 38H into AX.
Immediate (Port) to 16-bit Register.
IN AL,DX
Inputs 8-bit data from the port addressed by DX.
Register Indirect (Port) to Register (8bit).
IN AX,DX
Inputs 16-bit data from the port addressed by DX
Register Indirect (Port) to Register (16 Bit).
OUT 3845H,AL
Outputs 8-bit contents of AL to port 3845H.
Register(8-bit) to Immediate (Port)
OUT 3845H,AX
Outputs 16-bit contents of AX to port 3845H.
Register(16-bit) to Immediate (Port)

OUT DX,AL
Outputs 8-bit data from AL into port addressed by DX.
Register(8-bit) to Register Indirect (Port)

OUT DX,AX
Outputs 16-bit data from AX into port addressed by DX
Register(16-bit) To Register Indirect (Port)
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 LEA (Load Effective Address)
❖LEA instruction loads the offset value /address
of the source operand into registers, which are
used for accessing memory.
❖ No flags are effected
Eg: LEA SI,ADDR
Loads the offset address of the label ADDR
directly into the specified register SI.
eg. LEA AX, [BX+SI+10H]

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 C. Arithmetic Instructions
❖These instructions usually perform the arithmetic
operations like addition, subtraction,
multiplication and division.
❖The increment and decrement operations also
belong to this category.
❖The operands are either the registers or the
memory locations or immediate data,
depending upon the addressing mode.
❖Arithmetic instructions may affect the flags.

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 The ADD instruction
❖After the ADD instruction, the result will be in
the destination operand.

❖However, both the source and destination

operands cannot be memory operands. Means,
memory to memory addition is not possible.

❖Also, the contents of the segment registers

cannot be added using this instruction. 18
ADD AL,BL AL = AL+ BL
ADD CX,DI CX = CX+ DI
ADD CL,44H CL = CL+ 44H (Immediate Addition)
ADD 0100H AX = AX + 0100H (Destination register is AX - implicit)
ADD BX,245FH BX = BX + 245FH
ADD [BX],AL AL adds to the contents of the data segment (DS) memory location
(addressed by BX) and the sum is stored in the same memory location.

ADD CL,[BP] The byte(8 bit) contents of the stack segment (SS) memory location
(addressed by BP) will add to CL and the sum will be stored in CL.

ADD BX,[SI] The word (16 bit) contents of the data segment (DS) memory location
(addressed by SI) add to BX and the sum will be stored in BX.

ADD BX,TEMP[DI] The word contents of the data segment (DS) memory location
(addressed by TEMP+DI) add to BX, and result is stored in BX.

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❖ Any ADD instruction may modify the contents of the sign, zero ,
carry, auxiliary carry, parity and overflow flags.
For eg:

MOV DL,12H (DL will be loaded with a 12H by using

an immediate MOV instructions.)
ADD DL, 33H (33H is added to the 12H in DL by using
an immediate ADD instruction)

After the addition the sum(45H)moves into register DL and the

flags will change as follows.

Z =0 (Result Not Zero).

C =0 (No Carry)
A =0 (No Half-carry)
S =0 (Result Positive)
P =0 (Odd Parity)
O=0 (No Overflow)
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 Addition with Carry(ADC)
❖ This instruction performs the same operation as
ADD instruction, but adds the carry flag bit (C)
also, [which may be set as a result of the
previous calculation] to the result.
❖ All the condition code/status flags are affected
by this instruction.

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ADC AL,AH AL = AL + AH + carry

ADC CX,BX CX = CX + BX + carry

The byte(8 bit)contents of the DS memory

ADC DH,[BX] location [addressed by BX] add to DH with
carry. The sum will be stored in DH.

The word contents of the SS memory location

ADC BX,[BP] [addressed by BP] add to BX with carry.
The sum will be stored in BX.

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 Increment Addition (INC)
❖ INC adds a 1 to the contents of the specified
operand (except segment registers).
❖ Immediate data cannot be an operand for this
instruction
❖ All the condition flags may or may not be affected

INC BL ➔ BL=BL+1
INC SP ➔ SP=SP+1
INC 55H (is an illegal instruction)

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 Decrement Subtraction(DEC)
❖ Subtracts a 1 from the contents of the
specified operand.
❖ Immediate data cannot be operand of the
instruction.
DEC BH ➔ BH=BH-1
DEC CX ➔CX =CX-1
DEC 55H (is an illegal instruction)

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 Subtraction
❖ The subtract instruction subtracts the source
operand from the destination operand and the
result is stored in the destination operand.
❖ The types of subtraction not allowed are
Memory-to-Memory & between Segment
Registers
❖ Destination operand cannot be an immediate
data.
❖ Condition code flags may be affected.
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SUB CL,BL CL = CL – BL

SUB BX,CX BX = BX – CX

SUB DH,6FH DH = DH – 6FH

Subtracts the contents of CH from the content of the DS

SUB [DI],CH
memory location (addressed by DI)

Subtracts the byte(8 bit) contents of the SS memory location

SUB CH,[BP]
(addressed by BP) from CH

Subtracts the byte contents of the DS memory location

SUB AH,TEMP
(addressed by TEMP) from AH

Subtracts the word contents of the DS memory location

SUB DI,TEMP[SI]
(addressed by TEMP+SI) from DI

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 Immediate Subtraction
➢ It refers to subtracting a fixed value, known as an
immediate value, from a register or memory
location in assembly language programming
E.g.
MOV CH,22H (load 22H into CH using an
immediate MOV instruction.)
SUB CH, 44H (subtracts 44H from 22H,
using an immediate SUB
instruction)

After the subtraction, the difference moves into register

CH.

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 MUL (Multiplication)
➢This instruction multiplies an unsigned byte in some
source with an unsigned byte in AL register or an
unsigned word in some source with an unsigned word in
AX register.
➢The source can be a register or a memory location.
➢When a byte is multiplied by the content of AL, the result
(product) is put in AX.
➢When a word is multiplied by the content of AX, the
result is put in DX and AX registers.
➢If the most significant byte of a 16-bit result or the most
significant word of a 32-bit result is 0, CF and OF will
both be 0’s. AF, PF, SF and ZF are undefined after a MUL
instruction.
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MUL BH Multiply AL with BH; result in AX
Multiply AX with CX; result high word in
MUL CX
DX, low word in AX
Multiply AL with byte in DS pointed to
MUL BYTE PTR [BX]
by [BX]
Multiply AL with byte at effective address
FACTOR [BX], if it is declared as type
MUL FACTOR [BX] byte with DB. Multiply AX with word at
effective address FACTOR [BX], if it is
declared as type word with DW
MOV AX, MCAND_16 Load 16-bit multiplicand into AX
MOV CL, MPLIER_8 Load 8-bit multiplier into CL
MOV CH, 00H Set upper byte of CX to all 0’s
MUL CX AX times CX; 32-bit result in DX and AX
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 DIV (Division)
➢ This instruction is used to divide an unsigned word by a byte
or to divide an unsigned double word (32 bits) by a word.
➢ When a word is divided by a byte, the word must be in the AX
register.
➢ The divisor can be in a register or a memory location.
➢ After the division, AL will contain the 8-bit quotient, and AH
will contain the 8-bit remainder.
➢ When a double word is divided by a word, the most significant
word of the double word must be in DX, and the least
significant word of the double word must be in AX.
➢ After the division, AX will contain the 16-bit quotient and DX
will contain the 16-bit remainder.

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 Examples
DIV BL Divide word in AX by byte in BL; Quotient in
AL, remainder in AH
DIV CX Divide down word in DX and AX by word in
CX;
Quotient in AX, and remainder in DX.
DIV SCALE AX / (byte at effective address SCALE [BX])
[BX] if SCALE [BX] is of type byte; or (DX and
AX) / (word at effective address SCALE[BX]
if SCALE[BX] is of type word

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 BCD representation
➢ There are two types of BCD representation,
unpacked BCD and packed BCD.
➢ In unpacked BCD representation, each digit is stored
in a byte, while two digits are packed into a byte in
the packed BCD representation.
➢For ex: 12H is stored in unpacked BCD representation as
0000 0001 0000 0010
➢ In packed BCD representation, each digit is stored
using only 4-bits.(thus, two digits can be packed into
a byte)
➢Ex: 12H is stored in packed BCD representation as 0001
0010
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❑The binary representation is used internally for
operations.
❑Decimal numbers can be represented in one of
two forms. BCD or ASCII
❑There are only two instructions that support
addition and subtraction of packed BCD
numbers.

1. DAA (Decimal Adjust after Addition)

2. DAS (Decimal Adjust after Subtraction)
Read It??
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 ASCII Arithmetic Instructions
➢ When numbers are entered from the keyboard or
displayed on the monitor, they will be in ASCII form.

➢ The ASCII codes for numbers 0 to 9 are 30H through

39H.

➢ The arithmetic operations on numbers represented in

ASCII, requires special care.

➢ There are 4 instructions used with ASCII arithmetic

operations.
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1. AAA (ASCII Adjust after Addition)
2. AAS (ASCII Adjust after Subtraction)
3. AAM (ASCII Adjust after Multiplication)
4. AAD (ASCII Adjust before Division)

Reading Assignment ??

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 Basic Logic Instructions
➢Available logical instructions with 8086
instruction set are:
AND, OR, NOT, XOR, TEST etc..
➢Except for NOT, all of the logical operators are
binary operators (ie, they require two
operands).
➢All of these instructions affect the status flags.
✓The zero flag, sign flag and the parity flag are
mostly recording the useful information about the
result.

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 AND
AND instruction is used for performing bitwise logical ANDing.

Some examples :

AND AL,BL ➔ AL=AL AND BL

AND AX,CX ➔ AX=AX AND CX
AND CL,33H ➔ CL=CL AND 33H
AND DI,4FFFH ➔ DI=DI AND 4FFFH
AND AX,[DI] ➔ AX is ANDed with the word contents of
the DS memory location addressed by
DI.

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❖AND operation also clears bits of a binary
number. The task of clearing a bit in a binary
number is called masking.
❖The operation of the AND function showing
how bits of a number are masked (or cleared
to zero).

XXXX XXXX ➔unknown number

*0000 1111 ➔mask
------------------------------------------
0000 XXXX ➔RESULT

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AND instruction can be used for Changing from ASCII to BCD
(The ASCII codes for numbers 0 to 9 are 30H through 39H. )

An ALP code that converts the ASCII contents of BX

into BCD.
MOV BX,3135H ;loads ASCII
AND BX,0F0FH ;mask BX.
the process will be,
0011 0001 0011 0101
0000 1111 0000 1111
0000 0001 0000 0101 = 15H in
unpacked BCD
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 OR
OR instruction is used for performing bitwise logical ORing.

Some examples :

OR AH,BL ➔AH=AH OR BL
OR SI,DX ➔SI=SI OR DX
OR DH,0AH ➔DH OR 0AH
OR DX,[BX] ➔DX is ORed with the word content of
the DS memory location (addressed
by BX )

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❖ The operation of the OR function showing how bits of a
number are set to one.
❖ The OR operation sets any bit ; the AND operation clears
any bit.

XXXX XXXX ➔unknown number

+ 0000 1111 ➔
------------------------------------------
XXXX 1111 ➔RESULT

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OR instruction can be used for Changing from BCD to ASCII

An ALP code that converts the BCD contents of AX into

ASCII.
MOV AX, 0303H
OR AX, 3030H

the process will be,

0000 0011 0000 0011
0011 0000 0011 0000
0011 0011 0011 0011 = 3333H
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 NOT
❖NOT instruction inverts all bits of a byte, word, or
double world.
NOT CH ➔ CH is one’s complemented
NOT TEMP ➔ the contents of the DS memory
location addressed by TEMP is one’s
complemented.
MOV AX, 200FH
NOT AX
Means, AX = 0010 0000 0000 1111
will change the result in AX as
1101 1111 1111 0000 = DFF0H

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 Exclusive –OR (XOR)
❖A common use for the XOR instruction is to clear a
register to zero.

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 TEST Instruction
❖Test instruction is a logical compare instruction
which performs a bit by bit logical AND operation on
the two operands.
TEST DL,DH ➔DL is ANDed with DH
❖The difference between TEST and AND is that, the
AND instruction changes the destination operand,
while the TEST instruction does not.
✓ The TEST instruction performs a bitwise AND operation,
but it does NOT store the result anywhere.
✓ It is used only to test bits and update flags.
❖TEST instruction functions in the same manner as
CMP instruction. 45
 Reading Assignment ???
✓Rotate and shift instructions
✓string instructions

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