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Module 5 Filters

The document provides an overview of various types of electronic filters, including Low-Pass, High-Pass, Band-Pass, Band-Stop, and All-Pass filters, detailing their functions and frequency responses. It also discusses first and second-order Butterworth filters, their circuit models, and equations for calculating cutoff frequencies and gains. Additionally, it introduces Wide Band-Pass and Wide Band-Reject filters, explaining their characteristics and applications in signal processing.

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0% found this document useful (0 votes)
13 views13 pages

Module 5 Filters

The document provides an overview of various types of electronic filters, including Low-Pass, High-Pass, Band-Pass, Band-Stop, and All-Pass filters, detailing their functions and frequency responses. It also discusses first and second-order Butterworth filters, their circuit models, and equations for calculating cutoff frequencies and gains. Additionally, it introduces Wide Band-Pass and Wide Band-Reject filters, explaining their characteristics and applications in signal processing.

Uploaded by

vhegde734
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

‭Filters‬

‭Types of Filters‬

‭ ilters are used in electronics to allow certain frequency components to pass while attenuating others. The‬
F
‭major types of filters are:‬

‭1. Low-Pass Filter (LPF)‬


📌
‭ ‬‭Allows‬‭low frequencies to pass and‬‭attenuates‬‭high frequencies.‬

‭●‬ ‭Cutoff Frequency (fcf_c)‬‭: Defines the boundary between passband and stopband.‬

‭Frequency Response:‬

‭ ‬ f‭ < f_c → Signal passes with little attenuation.‬



‭●‬ ‭f > f_c → Signal attenuates at‬‭-20 dB/decade (1st order)‬‭.‬

‭2. High-Pass Filter (HPF)‬


📌
‭ ‬‭Allows‬‭high frequencies to pass and‬‭attenuates‬‭low frequencies.‬

‭Key Points:‬

‭‬ O
● ‭ pposite of an LPF.‬
‭●‬ ‭Used for‬‭removing DC offset‬‭or low-frequency noise.‬

‭Frequency Response:‬

‭ ‬ f‭ > f_c → Signal passes.‬



‭●‬ ‭f < f_c → Signal attenuates at‬‭-20 dB/decade (1st order)‬‭.‬

‭3. Band-Pass Filter (BPF)‬


📌
‭ ‬‭Allows only a specific range of frequencies‬‭and‬‭attenuates both lower and higher frequencies‬
‭outside this range.‬

‭Key Points:‬

‭‬ D
● ‭ efined by‬‭lower cutoff frequency (f_L)‬‭and‬‭upper cutoff frequency (f_H)‬‭.‬
‭●‬ ‭Used in‬‭radio communication, audio equalization, biomedical applications (ECG, EEG signal‬
‭processing)‬‭.‬
‭4. Band-Stop Filter (Notch Filter) (BSF)‬
📌
‭ ‬‭Blocks a specific band of frequencies‬‭and‬‭allows all others‬‭to pass.‬

‭Opposite of a Band-Pass Filter.‬‭Stopband:‬‭Betweenf_L and f_H frequencies.‬

‭5. All-Pass Filter (APF)‬


📌
‭ ‬‭Allows all frequencies to pass but alters the phase of the signal‬‭.‬

‭Frequency Response:‬

‭‬ M
● ‭ agnitude remains constant‬‭.‬
‭●‬ ‭Phase shift varies with frequency‬‭.‬

‭First Order Low Pass Filter‬


‭The figure shows the circuit model of the first-order low-pass Butter worth filter.‬

‭In the circuit we have:‬

‭ ‬ ‭Voltage‬ ‭‘Vin’‬ ‭as‬ ‭an‬ ‭input‬



‭voltage‬ ‭signal‬ ‭which‬ ‭is‬ ‭analog‬ ‭in‬
‭nature.‬
‭●‬ ‭Voltage‬ ‭‘Vo’‬ ‭is‬ ‭the‬ ‭output‬
‭voltage of the operational amplifier.‬
‭●‬ ‭Resistors‬‭‘RF’‬‭and‬‭‘R1’‬‭are‬‭the‬
‭negative‬ ‭feedback‬ ‭resistors‬ ‭of‬ ‭the‬
‭operational amplifier.‬
‭ ‬ ‭There‬ ‭is‬ ‭a‬ ‭single‬ ‭R-C‬ ‭network‬‭present‬‭in‬‭the‬‭circuit‬‭hence‬‭the‬‭filter‬‭is‬‭a‬‭first-order‬‭low‬

‭pass filter‬
‭Use the voltage divider rule at point ‘V1’ then we can get the voltage across the capacitor as,‬

V‭1‬‬ ‭
‭ = [ -jXc / (R-jXc) ] V‬
in‬ ‭
‭ Here –jXc = 1/2ᴫfc‬
‭After substitution this equation we will have something like below‬

V‭1‬‬ ‭
‭ = Vi‬
n‬ ‭
‭ / (1+j2ᴫfRC)‬

‭ ow‬‭the‬‭op-amp‬‭here‬‭used‬‭in‬‭negative‬‭feedback‬‭configuration‬‭and‬‭for‬‭such‬‭a‬‭case‬‭the‬‭output‬
N
‭voltage equation is given as,‬

V‭0‬‬ ‭
‭ = ( 1 + R‬
F‬ ‭
‭ / R‬
1‬ ‭
‭ ) V‬
1 .‬

‭If we submit V1 equation into Vo we will have,‬

V0 = (1 + R‬
‭ F‬‭
‭ / R‬) [V‬

1‬
‭ in‬ ‭
‭ / (1 + j2ᴫfRC) ]‬

‭After rewriting this equation we can have,‬

V‭0‬‬ ‭
‭ / V‬
in‬ ‭
‭ = A‬
F‬ ‭
‭ / ( 1 + j(f/f‬) )‬

L‬

‭In this equation,‬

‭‬
● ‭ ‭0‬ ‬ ‭/ V‬‭in‬ ‭= gain of the filter as a function of frequency‬
V
‭●‬ ‭AF = (1+ R‬‭F‬‭/ R‬‭1‭)‬ = passband gain of the filter‬
‭●‬ ‭f = frequency of the input signal‬
‭●‬ ‭f‬‭L‬ ‭=‬ ‭1‬ ‭/‬ ‭2ᴫRC‬ ‭=‬ ‭cutoff‬ ‭frequency‬ ‭of‬ ‭the‬ ‭filter.‬ ‭We‬ ‭can‬ ‭use‬ ‭this‬ ‭equation‬ ‭to‬ ‭choose‬
‭appropriate resistor and capacitor values to select the cutoff frequency of the circuit.‬
‭IConvert the above equation into a polar form we will have,‬

‭Case1: f<<f‬‭L‬‭.‬

‭Case2: f = f‬‭L‬‭.‬

‭Case3: f >f‬‭L‬‭.‬
‭Second-Order Butterworth Low Pass Filter‬
‭The figure shows the circuit model of the 2nd order Butterworth low pass filter.‬

‭In the circuit we have:‬

‭ ‬ ‭Voltage‬‭‘Vin’‬‭as‬‭an‬‭input‬‭voltage‬

‭signal which is analog in nature.‬
‭●‬ ‭Voltage‬ ‭‘Vo’‬ ‭is‬ ‭the‬ ‭output‬
‭voltage of the operational amplifier.‬
‭●‬ ‭Resistors‬ ‭‘RF’‬ ‭and‬ ‭‘R1’‬ ‭are‬ ‭the‬
‭negative‬ ‭feedback‬ ‭resistors‬ ‭of‬ ‭the‬
‭operational amplifier.‬
‭●‬ ‭There‬ ‭is‬ ‭a‬ ‭double‬ ‭R-C‬ ‭network‬
‭present‬‭in‬‭the‬‭circuit‬‭hence‬‭the‬‭filter‬‭is‬
‭a second-order low pass filter.‬
‭ ‬ ‭‘RL’ is the load resistance connected at the op-amp output.‬

‭Second Order Low Pass Butterworth Filter Derivation‬

‭ econd-order‬‭filters‬‭are‬‭important‬‭because‬‭higher-order‬‭filters‬‭are‬‭designed‬‭using‬‭them.‬‭The‬
S
‭gain‬‭of‬‭the‬‭second-order‬‭filter‬‭is‬‭set‬‭by‬‭R1‬‭and‬‭RF,‬‭while‬‭the‬‭cutoff‬‭frequency‬‭f‭H‬ ‬ ‭is‬‭determined‬
‭by R‬‭2‭,‬ R‬‭3‬‭, C‬‭2‬ ‭& C‬‭3‬ ‭values. The derivation for the‬‭cutoff frequency is given as follows,‬

f‭H‬‬ ‭
‭ = 1 / 2ᴫ sqrt (R‬R‬

2‬
‭ C‬

3‬
‭ C‬

2‬
‭ )‬

3‬

‭The voltage gain equation‬

‭In this equation,‬

‭‬
● ‭ ‭0‬ ‬ ‭/ V‬‭in‬ ‭= gain of the filter as a function of frequency‬
V
‭●‬ ‭A‭F‬ ‬ ‭= (1 + R‬‭F‭/‬ R‬‭1‬‭) passband gain of the filter‬
‭●‬ ‭f = frequency of the input signal‬
‭●‬ ‭f‬‭H‬ ‭= 1 / 2ᴫ sqrt (R‬‭2‭R ‬ ‬‭3‭C ‬ ‬‭C‬‭3‭)‬ ‬‭= cutoff frequency of the filter.‬
‬ ‭2
‭First -Order High Pass Filter‬

‭ ‬ ‭first-order‬ ‭Active‬ ‭High‬ ‭Pass‬ ‭Filter‬ ‭as‬ ‭its‬ ‭name‬ ‭implies,‬ ‭attenuates‬ ‭low‬
A
‭frequencies and passes high frequency signals.‬

‭ his‬ ‭first-order‬ ‭high‬ ‭pass‬ ‭filter‬‭,‬ ‭consists‬ ‭simply‬ ‭of‬ ‭a‬ ‭passive‬ ‭filter‬ ‭followed‬ ‭by‬ ‭a‬
T
‭non-inverting‬ ‭amplifier.‬ ‭The‬ ‭frequency‬ ‭response‬ ‭of‬ ‭the‬ ‭circuit‬ ‭is‬ ‭the‬ ‭same‬ ‭as‬ ‭that‬ ‭of‬ ‭the‬
‭passive‬ ‭filter,‬ ‭except‬ ‭that‬ ‭the‬ ‭amplitude‬ ‭of‬ ‭the‬ ‭signal‬ ‭is‬ ‭increased‬ ‭by‬ ‭the‬ ‭gain‬ ‭of‬ ‭the‬
‭amplifier.‬
‭ or‬‭a‬‭non-inverting‬‭amplifier‬‭circuit,‬‭the‬‭magnitude‬‭of‬‭the‬‭voltage‬‭gain‬‭for‬‭the‬‭filter‬‭is‬‭given‬
F
‭as‬ ‭a‬ ‭function‬ ‭of‬ ‭the‬ ‭feedback‬ ‭resistor‬ ‭(‬ ‭R2‬ ‭)‬ ‭divided‬‭by‬‭its‬‭corresponding‬‭input‬‭resistor‬‭(‬
‭R1‬‭) value and is given as:‬

‭Gain for an Active High Pass Filter‬

​‬‭ ‭Where:‬
‭​‬ ‭A‬‭F‬ ‭= the Pass band Gain of the filter, (‬‭1 + R2/R1‬‭)‬
‭​‬ ‭ƒ‬‭= the Frequency of the Input Signal in Hertz,‬‭(Hz)‬
‭​‬ ‭ƒc‬‭= the Cut-off Frequency in Hertz, (Hz)‬
‭ he‬‭operation‬‭of‬‭a‬‭high‬‭pass‬‭active‬‭filter‬‭can‬‭be‬‭verified‬‭from‬‭the‬‭frequency‬‭gain‬‭equation‬
T
‭above as:‬

‭Second -Order High Pass Filter‬

‭ he‬ ‭second‬ ‭order‬ ‭high‬ ‭pass‬ ‭Butterworth‬ ‭filters‬ ‭produces‬ ‭a‬ ‭gain‬ ‭roll‬ ‭off‬ ‭at‬ ‭the‬ ‭rate‬ ‭of‬ ‭40‬
T
‭dB/decade‬‭in‬‭the‬‭stop‬‭band.‬‭This‬‭filter‬‭also‬‭can‬‭be‬‭realized‬‭by‬‭interchanging‬‭the‬‭positions‬
‭of resistors and capacitors in a second order low pass Butterworth filters‬

‭ he‬ ‭resulting‬ ‭expression‬ ‭is‬ ‭given‬ ‭here‬ ‭for‬ ‭the‬ ‭convenience‬ ‭of‬ ‭the‬ ‭reader.‬ ‭The‬
T
‭voltage gain‬‭magnitude‬‭equation for the second order high pass filter is‬
‭Wide Band Pass Filter‬

‭A‬ ‭Wide‬ ‭Band-Pass‬ ‭Filter‬ ‭(WBPF)‬ ‭is‬ ‭a‬ ‭type‬ ‭of‬ ‭Band-Pass‬ ‭Filter‬ ‭(BPF)‬ ‭that‬
‭allows‬ ‭a‬ ‭broad‬ ‭range‬ ‭of‬
‭frequencies‬ ‭to‬ ‭pass‬ ‭while‬
‭attenuating‬ ‭frequencies‬
‭outside this range.‬

‭ ‬ ‭Passes signals within‬



‭a‬‭wide frequency range‬
‭(f_L < f < f_H​).‬
‭●‬ ‭Lower cutoff‬
‭frequency (f_L​)‭:‬ The point‬
‭where attenuation begins at‬
‭low frequencies.‬
‭●‬ ‭Upper cutoff‬
‭frequency (f_H​)‭:‬ The point‬
‭where attenuation begins at‬
‭high frequencies.‬
‭●‬ ‭The‬‭bandwidth‬
‭(BWBWBW)‬‭is given by:‬
‭BW = f_H - f_L‬
‭●‬ ‭Can be implemented using‬‭a combination‬‭of high-pass and low-pass‬
‭filters‬‭.‬

‭A‬‭Wide Band-Pass Filter‬‭is implemented using‬‭two cascaded active filters‬‭:‬


‭High-Pass Filter (HPF) and Low-Pass Filter (LPF).‬

‭ ‬‭Band‬‭Pass‬‭Filter‬‭Circuit‬‭is‬‭defined‬‭as‬‭a‬‭wide‬‭band‬‭pass‬‭if‬‭its‬‭figure‬‭of‬‭merit‬‭or‬
A
‭quality factor Q < 10.‬

‭ he‬‭relationship‬‭between‬‭Q,‬‭3‬‭db‬‭band‬‭width‬‭and‬‭the‬‭centre‬‭frequency‬‭f‭c‬ ‬ ‭is‬‭given‬
T
‭by‬

‭For the wide Band Pass Filter Circuit, the centre frequency can be defined as‬

‭where‬

‭ ‬ f‭‭H
● ‬ ‬ ‭= high cutoff frequency‬
‭●‬ ‭f‭L‬ ‬ ‭= low cutoff frequency of the wide bandpass‬
‭Wide Band Reject Filter‬

‭ ‬‭Wide‬ ‭Band‬‭Reject‬‭Filter‬‭is‬‭a‬
A
‭type‬ ‭of‬ ‭filter‬ ‭that‬ ‭attenuates‬ ‭a‬
‭broad‬ ‭range‬ ‭of‬ ‭frequencies‬
‭while‬ ‭allowing‬ ‭frequencies‬
‭below‬‭and‬‭above‬‭this‬‭range‬‭to‬
‭pass.‬

‭ ‬ ‭Rejects a wide range of‬



‭frequencies‬‭between‬‭f_L‬
‭(lower cutoff) and‬‭f_H‬‭(upper‬
‭cutoff).‬
‭●‬ ‭Frequencies‬‭below f_L‬
‭and above f_H pass through‬‭.‬
‭●‬ ‭Bandwidth (BW)‬‭is given‬
‭by: BW = f_H - f_L‬
‭●‬ ‭Implemented by combining‬
‭a‬‭Low-Pass Filter (LPF) and‬
‭High-Pass Filter (HPF) in‬
‭parallel‬‭.‬

‭ ‬ ‭Wide‬ ‭Band‬ ‭Reject‬ ‭Filter‬ ‭is‬


A
‭implemented by using:‬

‭ .‬‭First Stage: Low-Pass Filter (LPF)‬‭(Passes frequencies below f_L)‬


1
‭2.‬‭Second Stage: High-Pass Filter (HPF)‬‭(Passes frequencies above f_H)‬
‭3.‬‭Parallel Combination‬‭: The output of both filters is combined to form the‬
‭band-reject response‬‭.‬
Digital-to-Analog Converters (DAC)

A DAC is an electronic circuit that takes in digital data as input and transforms it into an analog output
signal. It is actually the output voltage proportional to the binary code given at the DAC input and then
used to drive various circuits.

BINARY WEIGHTED DAC

A weighted resistor DAC produces an analog output (voltage or current), which is equal to the digital
(binary) input by using binary weighted resistors in the inverting summing circuit. The weight is the
same as the gain of the channel.
Av3 = -1
Av2 = -0.5
Av1 = -0.25
Av0 = -0.125

Output of this circuit is given by:

Substituting R values,

It is the sum of input voltages. Note that negative sign only indicates the inverting amplifier.
With 4 inputs, there are 16 possible input combinations of v3v2v1v0: 0000, 0001, 0010, 0011, 0100,
0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, and 1111.
When all inputs are zero (0000), the output is:
Vout = 0
When v3 v2 v1 v0 = 0001, the output is:
Vout = -(0.125) = -0.125
When v3 v2 v1 v0 is 0010, the output is:
Vout = -(0.25) = -0.25
and so on. When the inputs are all 1s (1111), the output is maximum and equals:
Vout = -(1 +0.5 +0.25 +0.125)= - 1.875
If the D/A converter is driven by a circuit that produces the 0000 to 1111 sequence of numbers given
earlier, it will produce these output voltages:
0, -0.125, -0.25, -0.375, -0.5, -0.625, -0.75, -0.875, -1, -1.125, -1.25, -1.375, -1.5, -1.625, -1.75,
and -1.875.
The staircase voltage demonstrates that the D/A converter does not produce a continuous range of output
values. Therefore, strictly speaking its output is not truly analog. Low-pass filter circuits can be
connected to the output to provide a smoother transition between output steps.

R/2R Ladder DAC


(DAC) converts a digital input signal into an analog output signal. The digital signal is represented with
a binary code, which is a combination of bits 0 and 1.
3
As the name suggests, R-2R Ladder DAC produces an analog output, which is almost equal to the
digital (binary) input by using a R-2R ladder network in the inverting adder circuit.

A 4-input D/A converter has 16 possible outputs, an 8-input A/ D converter has 256 possible outputs,
and a 16-input D/A converter has 65,536 possible outputs.
The switches, D0 – D3, would normally be some type of active switch. The switches connect the four
inputs to either ground (logic 0) or Vref (logic 1). The ladder network converts the possible binary input
values from 0000 through 1111 to one of 16 unique output voltage levels. D0 is considered to be the
least significant input bit (LSB) while D3 is the most significant bit (MSB).
To determine the D/A converter’s output voltage, you must first change the binary input value to its
decimal equivalent value, BIN. This can be done by:

Then, the output voltage will be found by:

where N equals the number of inputs.


For example, D0 =1, D1 =0, D2 =0, and D3 =1. Using a Vref = 5 V, determininig the decimal equivalent
of the binary input (BIN) and the output voltage of the converter.

3.3 NON-LINEAR OPAMP CIRCUITS

The output of a nonlinear op-amp circuit usually has a different shape from the input signal because the
op-amp saturates during part of the input cycle.

Comparators with Zero Reference: zero-crossing detector

In this circuit the output voltage ideally switches from low to high or vice versa whenever the input
voltage crosses zero reference (x-axis) line. It can work as a comparator and it can build using an op
amp without feedback resistors, as shown in Fig.(a)
Because of the high open-loop voltage gain of op-amp, a positive input voltage produces positive
saturation, and a negative input voltage produces negative saturation.

4
‭Successive Approximation Register (SAR)‬

‭ he‬ ‭Successive‬ ‭Approximation‬ ‭Register‬ ‭(SAR)‬ ‭is‬ ‭a‬ ‭key‬ ‭component‬ ‭in‬
T
‭Successive‬‭Approximation‬‭Analog-to-Digital‬‭Converters‬‭(SAR‬‭ADCs)‬‭,‬‭which‬
‭efficiently‬ ‭convert‬ ‭an‬ ‭analog‬ ‭signal‬ ‭into‬ ‭a‬ ‭digital‬ ‭output‬ ‭by‬ ‭using‬ ‭a‬ ‭binary‬
‭search algorithm‬‭.‬

‭●‬ T ‭ he‬‭SAR ADC‬‭converts an‬‭analog input voltage‬‭(Vin into an N-bit‬‭digital‬


‭output‬‭.‬
‭●‬ ‭It uses a‬‭Successive Approximation Register (SAR)‬‭to determine each‬
‭bit‬‭one-by-one‬‭, starting from the‬‭MSB (Most Significant‬‭Bit) to LSB‬
‭(Least Significant Bit)‬‭.‬
‭●‬ ‭The process is based on‬‭binary search‬‭, minimizing the number of‬
‭comparison steps.‬

‭ .‬‭Initialize‬‭: The SAR register sets the‬‭MSB to ‘1’‬‭and all other bits to ‘0’.‬
1
‭2.‬‭Digital-to-Analog Conversion (DAC)‬‭: The SAR output is converted to an‬
‭analog voltage.‬
‭3.‬‭Comparison‬‭: The input voltage (VinV_{in}) is compared‬‭with the DAC‬
‭output.‬
‭○‬ ‭If Vin>VDAC → Keep the bit‬‭as '1'‬‭.‬
‭○‬ ‭If Vin<VDAC → Reset the bit‬‭to '0'‬‭.‬
‭ .‬‭Iterate for Next Bit‬‭: The process repeats for all bits from MSB to LSB.‬
4
‭5.‬‭Final Output‬‭: Once all bits are determined, the final‬‭digital output‬
‭represents Vin‬

‭Example (3-bit SAR ADC)‬


‭Assume Vin=5V, Vref=8V‬

‭Step‬ ‭ AR‬
S ‭DAC Output‬ ‭Comparison‬
‭ egister‬
R

‭1‬ ‭100‬ ‭4V‬ ‭5V > 4V → Keep ‘1’‬

‭2‬ ‭110‬ ‭6V‬ ‭5V < 6V → Reset ‘1’ to ‘0’‬

‭3‬ ‭101‬ ‭5V‬ ‭5V = 5V → Keep ‘1’‬

‭Final Output:‬‭101‬‭2‬ ‭= 5‬‭10‬‭.‬

‭Advantages of SAR ADC‬




‭ ‬‭Fast and Efficient‬


‭ ‬‭Low Power Consumption‬
‭ ‬‭High Resolution (Up to 16-bit or more)‬

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