《计算机组成与体系结构》

——本科生课程教学
计算机组成与设计
n 本课程的学习将使学生理解单处理器计算机系统中各部
件的内部工作原理、组成结构以及相互连接方式，具有
完整的计算机系统的整机概念；
n 理解计算机系统层次化结构概念，熟悉硬件与软件之间
的界面，掌握以RISC-V为代表的RISC指令集体系结构
的基本知识；
n 能够对有关计算机硬件系统中的理论和实际问题进行计
算与分析；能根据指令语义进行单周期/多周期/流水线
数据通路及其控制器的简单设计；能对RISC-V汇编程序
设计语言的相关问题进行分析。

Chapter 1 — Computer Abstractions and Technology — 2

COMPUTER ORGANIZATION AND DESIGN
RISC-V
Edition
The Hardware/Software Interface

Chapter 1
Computer Abstractions
and Technology
 §1.1 Introduction
1.1 The Computer Revolution
n Progress in computer technology
n Underpinned by Moore’s Law
n Makes novel applications feasible
n Computers in automobiles
n Cell phones
n Human genome project
n World Wide Web
n Search Engines
n Computers are pervasive

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Classes of Computers
n Personal computers
n General purpose, variety of software
n Subject to cost/performance tradeoff

n Server computers
n Network based
n High capacity, performance, reliability
n Range from small servers to building sized

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Classes of Computers
n Supercomputers
n High-end scientific and engineering
calculations
n Highest capability but represent a small
fraction of the overall computer market

n Embedded computers
n Hidden as components of systems
n Stringent power/performance/cost constraints

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The PostPC Era

Chapter 1 — Computer Abstractions and Technology — 7

The PostPC Era
n Personal Mobile Device (PMD)
n Battery operated
n Connects to the Internet
n Hundreds of dollars
n Smart phones, tablets, electronic glasses
n Cloud computing
n Warehouse Scale Computers (WSC)
n Software as a Service (SaaS)
n Portion of software run on a PMD and a
portion run in the Cloud
n Amazon and Google
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What You Will Learn
n How programs are translated into the
machine language
n And how the hardware executes them
n The hardware/software interface
n What determines program performance
n And how it can be improved
n How hardware designers improve
performance
n What is parallel processing
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Understanding Performance
n Algorithm
n Determines number of operations executed
n Programming language, compiler, architecture
n Determine number of machine instructions executed
per operation
n Processor and memory system
n Determine how fast instructions are executed
n I/O system (including OS)
n Determines how fast I/O operations are executed

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 §1.2 Eight Great Ideas in Computer Architecture
1.2 Seven Great Ideas
n Use abstraction to simplify design

n Make the common case fast

n Performance via parallelism

n Performance via pipelining

n Performance via prediction

n Hierarchy of memories

n Dependability via redundancy

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 §1.3 Below Your Program
1.3 Below Your Program
n Application software
n Written in high-level language
n System software
n Compiler: translates HLL code to
machine code
n Operating System: service code
n Handling input/output
n Managing memory and storage
n Scheduling tasks & sharing resources
n Hardware
n Processor, memory, I/O controllers

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Levels of Program Code
n High-level language
n Level of abstraction closer
to problem domain
n Provides for productivity
and portability
n Assembly language
n Textual representation of
instructions
n Hardware representation
n Binary digits (bits)
n Encoded instructions and
data

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 §1.4 Under the Covers
1.4 Components of a Computer
The BIG Picture n Same components for
all kinds of computer
n Desktop, server,
embedded
n Input/output includes
n User-interface devices
n Display, keyboard, mouse
n Storage devices
n Hard disk, CD/DVD, flash
n Network adapters
n For communicating with
other computers

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Touchscreen
n PostPC device
n Supersedes keyboard
and mouse
n Resistive and
Capacitive types
n Most tablets, smart
phones use capacitive
n Capacitive allows
multiple touches
simultaneously

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Through the Looking Glass
n LCD screen: picture elements (pixels)
n Mirrors content of frame buffer memory

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Opening the Box
Capacitive multitouch LCD screen

3.8 V, 25 Watt-hour battery

Computer board

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Inside the Processor (CPU)
n Datapath: performs operations on data
n Control: sequences datapath, memory, ...
n Cache memory
n Small fast SRAM memory for immediate
access to data

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Inside the Processor
n Apple A5

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Abstractions
The BIG Picture
n Abstraction helps us deal with complexity
n Hide lower-level detail
n Instruction set architecture (ISA)
n The hardware/software interface
n Application binary interface
n The ISA plus system software interface
n Implementation
n The details underlying and interface
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A Safe Place for Data
n Volatile main memory
n Loses instructions and data when power off
n Non-volatile secondary memory
n Magnetic disk
n Flash memory
n Optical disk (CDROM, DVD)

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Networks
n Communication, resource sharing,
nonlocal access
n Local area network (LAN): Ethernet
n Wide area network (WAN): the Internet
n Wireless network: WiFi, Bluetooth

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 §1.5 Technologies for Building Processors and Memory
1.5 Technology Trends
n Electronics
technology
continues to evolve
n Increased capacity
and performance
n Reduced cost
DRAM capacity

Year Technology Relative performance/cost

1951 Vacuum tube 1
1965 Transistor 35
1975 Integrated circuit (IC) 900
1995 Very large scale IC (VLSI) 2,400,000
2013 Ultra large scale IC 250,000,000,000

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Semiconductor Technology
n Silicon: semiconductor
n Add materials to transform properties:
n Conductors
n Insulators
n Switch

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Manufacturing ICs

n Yield: proportion of working dies per wafer

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Intel Core i7 Wafer

n 300mm wafer, 280 chips, 32nm technology

n Each chip is 20.7 x 10.5 mm
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Integrated Circuit Cost
Cost per wafer
Cost per die 
Dies per wafer  Yield
Dies per wafer  Wafer area Die area
1
Yield 
(1 (Defects per area  Die area/2)) 2

n Nonlinear relation to area and defect rate

n Wafer cost and area are fixed
n Defect rate determined by manufacturing process
n Die area determined by architecture and circuit design

Chapter 1 — Computer Abstractions and Technology — 27

 §1.6 Performance
1.6 Defining Performance
n Which airplane has the best performance?

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Response Time and Throughput
n Response time
n How long it takes to do a task
n Throughput
n Total work done per unit time
n e.g., tasks/transactions/… per hour
n How are response time and throughput affected
by
n Replacing the processor with a faster version?
n Adding more processors?
n We’ll focus on response time for now…

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Relative Performance
n Define Performance = 1/Execution Time
n “X is n time faster than Y”
Performanc e X Performanc e Y
 Execution time Y Execution time X  n

n Example: time taken to run a program

n 10s on A, 15s on B
n Execution TimeB / Execution TimeA
= 15s / 10s = 1.5
n So A is 1.5 times faster than B
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Measuring Execution Time
n Elapsed time
n Total response time, including all aspects
n Processing, I/O, OS overhead, idle time
n Determines system performance
n CPU time
n Time spent processing a given job
n Discounts I/O time, other jobs’ shares
n Comprises user CPU time and system CPU
time
n Different programs are affected differently by
CPU and system performance
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CPU Clocking
n Operation of digital hardware governed by a
constant-rate clock
Clock period

Clock (cycles)

Data transfer
and computation
Update state

n Clock period: duration of a clock cycle

n e.g., 250ps = 0.25ns = 250×10–12s
n Clock frequency (rate): cycles per second
n e.g., 4.0GHz = 4000MHz = 4.0×109Hz
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CPU Time
CPU Time  CPU Clock Cycles  Clock Cycle Time
CPU Clock Cycles

Clock Rate
n Performance improved by
n Reducing number of clock cycles
n Increasing clock rate
n Hardware designer must often trade off clock
rate against cycle count

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CPU Time Example
n Computer A: 2GHz clock, 10s CPU time
n Designing Computer B
n Aim for 6s CPU time
n Can do faster clock, but causes 1.2 × clock cycles
n How fast must Computer B clock be?
Clock CyclesB 1.2  Clock Cycles A
Clock Rate B  
CPU Time B 6s
Clock Cycles A  CPU Time A  Clock Rate A
 10s  2GHz  20  10 9
1.2  20  10 9 24  10 9
Clock Rate B    4GHz
6s 6s
Chapter 1 — Computer Abstractions and Technology — 34
Instruction Count and CPI
Clock Cycles  Instruction Count  Cycles per Instruction
CPU Time  Instruction Count  CPI  Clock Cycle Time
Instruction Count  CPI

Clock Rate
n Instruction Count for a program
n Determined by program, ISA and compiler
n Average cycles per instruction
n Determined by CPU hardware
n If different instructions have different CPI
n Average CPI affected by instruction mix

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CPI Example
n Computer A: Cycle Time = 250ps, CPI = 2.0
n Computer B: Cycle Time = 500ps, CPI = 1.2
n Same ISA
n Which is faster, and by how much?
CPU Time  Instructio n Count  CPI  Cycle Time
A A A
 I  2.0  250ps  I  500ps A is faster…
CPU Time  Instructio n Count  CPI  Cycle Time
B B B
 I  1.2  500ps  I  600ps
CPU Time
B  I  600ps  1.2
…by this much
CPU Time I  500ps
A
Chapter 1 — Computer Abstractions and Technology — 36
 CPI in More Detail
n If different instruction classes take different
numbers of cycles
n
Clock Cycles   (CPIi  Instruction Count i )
i1

n Weighted average CPI

Clock Cycles n
 Instruction Count i 
CPI     CPIi  
Instruction Count i1  Instruction Count 

Relative frequency

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CPI Example
n Alternative compiled code sequences using
instructions in classes A, B, C
Class A B C
CPI for class 1 2 3
IC in sequence 1 2 1 2
IC in sequence 2 4 1 1

n Sequence 1: IC = 5 n Sequence 2: IC = 6
n Clock Cycles n Clock Cycles
= 2×1 + 1×2 + 2×3 = 4×1 + 1×2 + 1×3
= 10 =9
n Avg. CPI = 10/5 = 2.0 n Avg. CPI = 9/6 = 1.5
Chapter 1 — Computer Abstractions and Technology — 38
Performance Summary
The BIG Picture

Instructions Clock cycles Seconds

CPU Time   
Program Instruction Clock cycle

n Performance depends on
n Algorithm: affects IC, possibly CPI
n Programming language: affects IC, CPI
n Compiler: affects IC, CPI
n Instruction set architecture: affects IC, CPI, Tc

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 §1.7 The Power Wall
1.7 Power Trends

n In CMOS IC technology
Power  Capacitive load  Voltage 2  Frequency

×30 5V → 1V ×1000

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Reducing Power
n Suppose a new CPU has
n 85% of capacitive load of old CPU
n 15% voltage and 15% frequency reduction
Pnew Cold  0.85  (Vold  0.85) 2  Fold  0.85 4
 2
 0.85  0.52
Pold Cold  Vold  Fold

n The power wall

n We can’t reduce voltage further
n We can’t remove more heat
n How else can we improve performance?
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 §1.11 Concluding Remarks
Concluding Remarks
n Cost/performance is improving
n Due to underlying technology development
n Hierarchical layers of abstraction
n In both hardware and software
n Instruction set architecture
n The hardware/software interface
n Execution time: the best performance
measure
n Power is a limiting factor
n Use parallelism to improve performance
Chapter 1 — Computer Abstractions and Technology — 42