Chapter 5
central processing unit (CPU)
Prepared by: Berhanu F. (MSc)
Introduction
At the center of the computer system there is a unit so called
the ‘brain’ of the computer system, processor, which is
commonly referred to as the Central Processing Unit (CPU).
The central processing unit (CPU) is the main part of the
computer system. Among other things, its configuration
determines whether computer is fast or slow in relation to
other computers.
The CPU is the most complex computer system component,
responsible for directing most of the computer system
activities based on the instructions provided.
As one computer generation has evolved to the next, the size
of the CPU has become smaller and smaller, while its speed
and capacity have increased tremendously.
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The functions of the processor can be summarizing as:
Carrying out arithmetic and logical functions
Controlling the use of main storage (memory) to store data
and instructions.
Controlling the sequence of operations
Controlling all the parts of the computer system.
The CPU has three main parts: Control unit (CU),
Arithmetic-logic unit (ALU), Registers.
The parts of the CPU are usually connected by an
electronic component referred to as a bus, which acts as an
electronic highway between them.
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Control Unit
It performs all the control functions for the computer
operations.
The control unit, a complex electronic circuitry, is
responsible for directing and coordinating most of the
computer system activities.
It does not execute instructions itself; it tells other
parts of the computer system what to do.
For instance; it tells
input devices how data is to be entered,
the memory unit where the data to be stored,
the ALU where to find the data, what operations to perform
and where the results are to be stored
the output devices what information to give and where to
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display.
The control unit repeats a set of four basic operations:
fetching, decoding, executing, and storing.
A. Fetching: is the process of obtaining a program
instruction or data item from memory.
B. Decoding: is the process of translating the instruction in
to commands the computer can execute.
C. Executing: is the process of carrying out the commands.
D. Storing: is the process of writing the result to memory
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Arithmetic Logical Unit
This part of CPU performs the Arithmetic calculations of
addition, subtraction, multiplication, division and
comparisons.
The objective of most instructions that use comparisons is to
determine which instructions should be executed next.
This unit contains adder, counter, comparator, and
complimentary circuit etc. to do different operations.
ALU also support the three major logic operations i.e. AND
(Logical Multiplication), OR (Logical addition) and NOT
(Logical Negation).
The ALU controls the speed of calculations and so receives a
great deal of attention from computer engineers trying to meet
the need of the fast-paced business world.
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Registers
To temporarily store data and instructions, the CPU has
special-purpose storage devices called registers
Registers are storage units that connect the arithmetic-
Logic unit to the main memory.
When an instruction is fetched from main memory, it is
placed in a register to wait for its execution.
Data are also stored in registers prior to execution in the
ALU.
BUS’ is a communication pathway, connecting two or more
devices.
A bus that connects major computer components (Processor,
memory, I/O) is called a system bus
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In Basic Computer, there is only one general
purpose register, the Accumulator (AC)
In modern CPUs, there are many general purpose
registers
It is advantageous to have many registers
Transfer between registers within the processor
are relatively fast
Going “off the processor” to access memory is
much slower
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There are may different bus designs, on any bus, the lines can be
classified into three functional groups. Data, Address & Control
Lines.
Data Lines : provides a path for moving data between system
modules. These lines collectively, called as the data bus.
The data bus may consist of from 32 to 100’s of separate lines,
the number of lines being referred to as the width of the data
bus.
Address Lines: are used to designate the source or destination
of the data on the data bus.
Control Lines: are used to control the access to and the use of
the data lines and address lines. Because the data/address lines
are shared by all components there must be a means of
controlling their use.
Control signals transmit both command and timing information
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between system modules.
GENERAL REGISTER ORGANIZATION
BUS: A, B
Clock Input
R1
R2
R3
R4
R5
R6
R7
Load
(7 lines)
SELA { MUX MUX } SELB
3x8 A bus B bus
decoder
SELD
OPR ALU
Output
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OPERATION OF CONTROL UNIT
The control unit
Directs the information flow through ALU by
- Selecting various Components in the system
- Selecting the Function of ALU
Example: R1 R2 + R3
[1] MUX A selector (SELA): BUS A R2
[2] MUX B selector (SELB): BUS B R3
[3] ALU operation selector (OPR): ALU to ADD
[4] Decoder destination selector (SELD): R1 Out Bus
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General STACK ORGANIZATION
Stack
Very useful feature for nested subroutines, nested
interrupt services
Also efficient for arithmetic expression evaluation
Storage which can be accessed in LIFO
Pointer: SP or TOS
Only PUSH and POP operations are applicable
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Initially, SP is decide to O, EMTY is set to 1, FULL = 0, so that
SP points to the word at address O and the stack is masked
empty and not full.
PUSH
SP SP + 1 increment stack pointer
M [SP] DR unit item on top of the Stack
If (SP = 0) then (FULL 1) check it stack is full
EMTY 0 mask the stack not empty.
POP
DR [SP] read item trans the top of stack
SP SP –1 decrement SP
If (SP = 0) then (EMTY 1) check it stack is empty
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F. (MSc)
0 mark the stack not full.
REVERSE POLISH NOTATION
Arithmetic Expressions: A + B
o A + B Infix notation
o + A B Prefix or Polish notation
o A B + Postfix or reverse Polish notation
• The reverse Polish notation is very suitable for stack
manipulation
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INSTRUCTION FORMAT
The most common fields found in instruction format
are:-
An operation code field that specified the operation to
be performed
An address field that designates a memory address or
a processor registers.
A mode field that specifies the way the operand or the
effective address is determined.
Computers may have instructions of several different
lengths containing varying number of addresses.
The number of address field in the instruction format
of a computer depends on the internal organization of
its registers.
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Most computers fall into one of three types of CPU
organization.
Single Accumulator organization
ADD X AC AC + M [×]
General Register Organization
ADD R1, R2, R3 R R2 + R3
Stack Organization
PUSH X
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Three address Instruction
Computer with three addresses instruction format can
use each address field to specify either processor
register or memory operand
Program to evaluate X = (A + B) * (C + D) :
ADD R1, A, B /* R1 M[A] + M[B] */
ADD R2, C, D /* R2 M[C] + M[D] */
MUL X, R1, R2 /* M[X] R1 * R2 */
The advantage of the three address formats is that it
results in short program when evaluating arithmetic
expression. The disadvantage is that the binary-coded
instructions require too many bits to specify three
addresses.
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Two Address Instruction
Most common in commercial computers. Each address
field can specify a processes register on a memory word.
Program to evaluate X = (A + B) * (C + D) :
MOV R1, A /* R1 M[A] */
ADD R1, B /* R1 R1 + M[B] */
MOV R2, C /* R2 M[C] */
ADD R2, D /* R2 R2 + M[D] */
MUL R1, R2 /* R1 R1 * R2 */
MOV X, R1 /* M[X] R1
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ONE ADDRESS INSTRUCTIONS
One-address instructions use an accumulator (AC) register
for all data manipulations.
The program to evaluate X= (A+B) ´ (C+D) is:
LOAD A /* AC M[A] */
ADD B /* AC AC + M[B] */
STORE T /* M[T] AC */
LOAD C /* AC M[C] */
ADD D /* AC AC + M[D] */
MUL T /* AC AC * M[T]*/
STORE X /* M[X] AC */
All operations are done between the AC register and a
memory operand. T is the address of a temporary memory
location required for storing the intermediate result.
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Zero Address Instructions
A stack organized computer does not use an address field for the
instruction ADD and MUL. The PUSH & POP instruction,
however, need an address field to specify the operand that
communicates with the stack .
PUSH A /* TOS A */
PUSH B /* TOS B */
ADD /* TOS (A + B) */
PUSH C /* TOS C */
PUSH D /* TOS D */
ADD /* TOS (C + D) */
MUL /* TOS (C + D) * (A + B) */
POP X /* M[X] TOS
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ADDRESSING MODES
The operation field of an instruction specifies the operation
to be performed.
The way the operands are chosen during program execution
is dependent on the addressing mode of the instruction.
The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the
operand is actually referenced. Computers use addressing
mode techniques for the purpose of accommodating one or
both of the following provisions.
To give programming versatility to the user by providing
such facilities as pointers to memory, counters for loop
control, indexing of data and program relocation.
To reduce the number of bits in the addressing field of the
instruction
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Program Counter (PC) keeps track of the instruction in
the program stored in memory. PC holds the address of
the instruction to be executed next and in incremented
each time an instruction is fetched from memory.
Types of Address Mode
Implied Mode :In this mode the operands are specified
implicitly in the definition of the instruction. For
example, the instruction “complement accumulator” is
an implied mode instruction because the operand in the
accumulator register is implied in the definition of the
instruction.
Immediate Mode: In this mode the operand is specified
in the instruction itself. In other words, an immediate
mode instruction has an operand field rather than the
address field. Immediate mode instruction are useful for
initializing registers to a constant value.
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Register Mode : In this mode the operands are in
registers that reside within the CPU. The particular
register is selected from a register field in the
instruction.
Register Indirect Mode : In this mode the
instruction specifies a register in the CPU whose
contents give the address of the operand I in memory
. In other words, the selected register contains the
address of the operand rather than the operand itself.
Autoincrement and Autodecrement Mode: This is
similar to the register in direct mode except that the
register is incremented or decremented after its value
is used to access memory.
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Direct Address Mode : In this mode the effective address
is equal to the address part of the instruction. The operand
is resides in the memory and its address is given directly
by the address field of the instruction.
Indirect Address Mode : In this mode the address field
of the instruction gives the address of the effective
address is stored in the memory. Control fethes the
instruction from memory and uses its address part to
access memory again to read the effective address.
Effective address= address part of the instruction + content of CPU
register.
Relative Address Mode: In this mode the content of the
program counter is added to the address part of the
instruction in order to obtain the effective address
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Indexed Addressing Mode :In this mode the content
of an index register is added to the part of the
instruction to obtain the effective address. Index
register is the special CPU register that contains an
index value. The address field of the instruction defines
the beginning address of a data array in the memory.
Base Register Addressing Mode: In this mode the
content of the base register is added to the address part
of the instruction to obtain the effective address. This is
similar to the indexed addressing mode except that the
register is now called the base register instead of an
index register.
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Data Transfer and Manipulation instructions
Most computer instructions can be classified into
three categories:
Data Transfer Instructions
Transfer of data from one location to another
without changing the contents
Data Manipulation Instructions
Operations like arithmetic, logical and shift
Program Control Instructions
Provides decision taking capabilities and changes
the path taken by the program.
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Some typical data transfer instructions
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Load : transfer from memory to a processor register,
usually an AC (memory read)
Store : transfer from a processor register into memory
(memory write)
Move : transfer from one register to another register
Exchange : swap information between two registers
or a register and a memory word
Input / Output : transfer data among processor
registers and input/output device
Push/Pop : transfer data between processor registers
and a memory stack
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CISC and RISC
An important aspect of computer architecture is the design of the
instruction set for the processor.
The instruction set chosen for a particular computer determines
the way that machine language programs are constructed.
• Early computers had small and simple instruction sets, forced
mainly by the need to minimize the hardware to implement
them.
• As digital hardware became cheaper with the advent of
integrated circuits, computer instructions tended to increase both
in number and complexity.
Complex Instruction Set Computer :
A computer with large number of instructions (100 or more).
Reduced Instruction Set Computer :
A computer with lower number of instructions with simple
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constructs.
CISC characteristics
Large number of instructions typically from 100 to 250
instructions
Some instructions that perform specialized tasks and are
used infrequently
A large variety of addressing modes typically from 5 to 20
different modes
Variable length instruction formats
Instructions that manipulate operands in memory
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RISC characteristics
Relatively few instructions
Relatively few addressing modes
Memory access limited to load & store instruction
All operations done within the registers of the CPU.
Fixed-length, easily decoded instruction format
Single-cycle instruction execution
Hand-wired rather than micro-programmed control.
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Thanks!!!
Prepared by: Berhanu F. (MSc)