Digital Fundamentals
ELEVENTH EDITION
GLOBAL EDITION
CHAPTER 5
Combinational
Logic Analysis
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Basic Combinational Logic Circuits
When Logic gates are connected together to produce a specified output for
certain specified combinations of input variables, with no storage involved, the
resulting circuit is in the category of Combinational Logic.
In the combinational logic, the output level is at all times dependent on the
combination of input levels.
AND-OR Logic
FIGURE 5-1 An example of AND-OR logic.
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Example:
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AND-OR-Invert Logic.
FIGURE 5-3 An AND-OR-Invert circuit produces a POS output.
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Where is the difference?
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Exclusive-OR Logic
FIGURE 5-5 Exclusive-OR logic diagram and symbols.
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Exclusive-NOR Logic
The complement of the exclusive-OR function is the exclusive-NOR, which is
derived as follows:
FIGURE 5-6 Two equivalent ways of implementing the exclusive-NOR.
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Implementing Combinational Logic
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Implementing Combinational Logic
_ _
FIGURE 5-10 Logic circuits for X = AB(CD + EF) = ABCD + ABEF.
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From a Truth Table to a Logic Circuit
If you begin with a truth table instead of an expression, you can write the
SOP expression from the truth table and then implement the logic circuit.
TABLE 5–3
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_ _
FIGURE 5-11 Logic circuit for X = ĀBC + ABC.
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Example
Design a logic circuit to implement the operation specified in the truth table of
Table 5-4.
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Logic circuit of previous Truth Table
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Example
Develop a logic circuit with four input variables that will only produce a 1
output when exactly three input variables are 1s.
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Logic circuit of previous Truth Table
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Example:
Reduce the combinational logic circuit in Figure to a minimum form.
Solution: The expression for the output of the circuit is
Applying DeMorgan’s Theorem and Boolean algebra,
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Example:
Minimize the combinational logic circuit in Figure. Inverters for the
complemented variables are not shown.
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The output expression is
_
Expanding the first term to include the missing variables D and D.
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The Universal Property of NAND Gates
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The Universal Property of NOR Gates
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5-4 Combinational Logic Using NAND and NOR Gates
NAND Logic
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Since a bubble represents an inversion, two connected bubbles represent a
double inversion and therefore cancel each other.
FIGURE 5-21 Development of the AND-OR equivalent of the circuit in
Figure 5-20.
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FIGURE 5-22 Illustration of the use of the appropriate dual symbols in a
NAND logic diagram.
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Example: Redraw the logic diagram and develop the output expression for the
circuit in Figure using the appropriate dual symbols.
Solution:
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Example: Implement each expression with NAND logic using appropriate dual
symbols.
Solution:
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5-4 Combinational Logic Using NAND and NOR Gates
NOR Logic
FIGURE 5-26 NOR logic for X = (A + B)(C + D).
Consider the NOR logic in Figure. The output expression is developed as
follows.
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FIGURE 5-27
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FIGURE 5-28 Illustration of the use of the appropriate dual symbols in a
NOR logic diagram.
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Example: Using the appropriate dual symbols, redraw the logic diagram and
develop the output expression for the circuit in Figure.
Solution:
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5.5 Pulse Waveform Operation
Example: Draw the timing diagram for the circuit in Figure showing the
outputs of G1, G2, G3 (X) with the input waveforms A and B, as indicated.
Solution:
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Example: Determine the
waveform X for the logic circuit
in Figure.
Solution:
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Problems:
Write the output expression for each circuit in Figure.
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Write the output expression for each circuit in Figure.
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Write the output expression for each circuit as it appears in Figures and
then change each circuit to an equivalent AND-OR configuration.
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Write the output expression for each circuit as it appears in Figures and
then change each circuit to an equivalent AND-OR configuration.
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Write the output expression for each circuit as it appears in Figures and
then change each circuit to an equivalent AND-OR configuration.
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Use AND gates, OR gates, and inverters as needed to implement the
following logic expressions as stated:
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Use AND gates, OR gates, and inverters as needed to implement the
following logic expressions as stated:
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Use NAND gates, NOR gates, or combinations of both to implement the
following logic expressions as stated:
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Implement a logic circuit for the truth table in Table 5-8.
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Implement a logic circuit for the truth table in Table 5-8.
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Implement a logic circuit for the truth table in Table 5-8. (cont.)
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Simplify the circuit in Figure as much as possible, and verify that the
simplified circuit is equivalent to the original by showing that the truth
tables are identical.
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Simplify the circuit in Figure as much as possible, and verify that the
simplified circuit is equivalent to the original by showing that the truth
tables are identical.
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The output of the logic circuit and input waveforms in Figure is passed
through an inverter. Draw output waveform.
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For the input waveform in Figure, what logic circuit will generate the output
waveform shown?
X is HIGH when ABC are all HIGH or when A is HIGH and B is LOW and
C is LOW or when A is HIGH and B is LOW and C is HIGH
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For the input waveform in Figure, what logic circuit will generate the output
waveform shown?
X is HIGH when ABC are all HIGH or when A is HIGH and B is LOW and
C is LOW or when A is HIGH and B is LOW and C is HIGH
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For the circuit in Figure, draw the waveforms
at the numbered points in proper relationship
to each other.
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For the logic circuit and the input waveforms in Figure, the indicated output
waveform is observed. Determine if this is the correct output waveform.
X is HIGH only when ABCD are all HIGH. This does not occur in the
waveforms, so X should remain LOW. The output is incorrect.
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Determine the correct output waveform in relation to the inputs.
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Determine the correct output waveform in relation to the inputs (cont.)
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Self-Test Answers
1-d
2-b
3-c
4-a
5-d
6-b
7-a
8-d
9-d
10-e
11-e
12-c
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