MIT Academy of Engineering, Alandi(D), Pune

School of E&TC Engineering

A.Y. 2023-24
SYBTech

Course: ARM-Based Embedded System Design

Course Code: 2307214

𝑆𝑎𝑣𝑖𝑡𝑎 𝑃𝑎𝑤𝑎𝑟

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 Unit 2: ARM Philosophy
• Applications/Case Study: Why APPLE has shifted to ARM?
• Contents:
– RISC design philosophy,
– ARMs approach towards RISC,
– ARM processors and its versions,
– ARM7, ARM9 ARM11 features, advantages.
– Introduction to ARM CORTEX series processors, Features
Applications,
– Improvement of CORTEX over classical series, Survey on ARM
Cortex based microcontrollers, its features and comparison,
CORTEX-M4 Core architecture.
• Further Readings/Self Study: Comparative study of ARM
processor-based architecture variants

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 Introduction
1990
Arm: What is it? What is it not?
History
• Started as Acorn RISC Machine
• Previously, Advanced RISC Machine
• Now, Arm 2004
Market:
• Portable, battery-powered devices‍—
‍smartphones, laptops and tablet
computers, and other embedded systems
• Also useful for servers and desktops to 2018
some degree.
• For supercomputers, which consume large
amounts of electricity, Arm is also a
power-efficient solution. Courtesy: Google Image Search
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arm

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 ARM Family
There are three architecture profiles:
A, R and M.

A-Profile (Applications)
• High performance.
• Designed to run a complex operating system,
such as Linux or Windows.

R-Profile (Real-Time)

(Bottom):[Link]
Source: (Top): [Link]
• Targeted at systems with real-time
requirements.
• Commonly found in networking equipment,
and embedded control systems.

M-Profile (Microcontroller)
• Smallest/lowest power. Small, highly power-
efficient devices.
• Found at the heart of many IoT devices.

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ARM in Mobile application

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 ARM Architecture
Architecture is the functional specification for a processor
 A contract between the hardware and the software

• The function of each instruction.

Instruction set • How that instruction is represented in memory (its
encoding).

• The number and size of the registers.

Register set • The function of the registers.
• Their initial state.

• The different levels of privilege.

Exception model • The types of exceptions.
• What happens on taking or returning from an exception.

• How memory accesses are ordered.

Memory model • How the caches behave, when and how software
must perform explicit maintenance

Debug, trace, • How breakpoints are set and triggered.

• What information can be captured by trace tools and in
and profiling what format.
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ARM Version (History)

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 ARM – RISC or CISC?
RISC (Reduced Instruction Set Computer) CISC (Complex Instruction Set Computer)
Goal - Reduce the complexity of instructions Goal - Incorporate hardware support as much as
performed by the hardware possible
Reduced number of instruction classes Vast and Complex number of instruction sets
Instructions are of fixed length and take single Instructions are of variable size and take many
cycle to execute cycles to execute
Simple instruction pipeline Complex instruction pipeline
Large general-purpose register set. Dedicated registers for specific purposes.
Registers can contain either data or an address.
Load-Store architecture: Processor operates on In CISC design the data processing operations can
data held in registers. Separate load and store act on memory or register operands.
instructions transfer data between the register
bank and external memory.
Emphasizes on software complexity Emphasizes on hardware complexity.

So, is
Arm
RISC or
CISC? 9
 RISC Design Philosophy

❖Instruction Set
❖Pipeline
❖General purpose registers
❖Load/ Store Architecture
❖Complexity-Compiler/ Processor

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 ARM Design Philosophy
❖Power Consumption
❖High code density
❖Slow & low cost memories
❖Physical Size
❖Hardware debug technology
➢JTAG debugger

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ARM Core Dataflow model

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 ARM 7 Instruction Set Architecture (ISA)

• All instructions are 32 bits long.

• Most instructions execute in a single cycle.
• Almost all instructions can be conditionally executed.
• Load-Store architecture
– Data processing instructions act only on registers
• Three operand format
• Combined ALU and shifter for high speed bit manipulation
– Specific memory access instructions with powerful auto-
indexing addressing modes.
• 32 bit and 8 bit data types
– and also 16 bit data types on ARM Architecture v4.
• Flexible multiple register load and store instructions
• Instruction set extension via coprocessors

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 Instruction set used in ARM
❖Variable cycle execution for certain instructions
❖ Inline barrel shifter leading to more complex
instructions
❖Thumb16-bit instruction set
❖Conditional execution
❖Enhanced instructions

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 Non RISC ideas in ARM

❖ARM allows variable cycle execution on certain

instructions to save power, area, and code size.
❖ARM adds a barrel shifter to expand the capability of
certain instructions.
❖ARM uses the Thumb 16-bit instruction set to
improve code density.

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ARM Processor Evolution

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 ARM processors
Features ARM7 ARM9 ARM11 Cortex
Release
Early 1990s 2001 2002 2004 onwards
timeframe
ARMv7 and
Instruction set ARMv3/v4 ARMv4T ARMv6
above
Pipeline
3 5 8 8 and above
stages
Clock Speed 30-100 MHz Up to 200 MHz Up to 600 MHz Up to 3 GHz+
Advanced
Basic 3-stage Improved 5- Deeper 8-
multi-stage
pipeline, stage pipeline, stage pipeline,
pipelines,
Features Thumb ISA for multimedia and Jazelle DBX,
NEON,
code density, DSP media
TrustZone,
MMU optional extensions instructions
multi-core
Feature Smartphones,
PDA, routers, phones, Smartphones, tablets,
Applications
printers smartphones, mobile devices servers, IoT
gaming devices devices
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[Link]
 Advantages of ARM Processor
• Affordable to create – ARM Processor is very affordable as it does not need
expensive equipment’s for its creation. When compare to other processors, it is
created at much lesser price. This is why they are apt for making of low cost Mobile
phones and other electronic devices.
• Low Power Consumption – AMP Processors have lesser power consumption. They
were initially designed for performing at lesser power. They even have lesser
transistors in their architecture. They have various other features that allow for
this.
• Work Faster – ARM performs single operation at a time. This makes it work faster.
It has lower latency that is quicker response time.
• Multiprocessing feature – ARM processors are designed so that they can be used
in cases of multiprocessing systems where more than one processors are used to
process information. First AMP processor introduced by name of ARMv6K had
ability to support 4 CPUs along with its hardware.
• Better Battery Life – ARM Processors have better battery life. This is seen from
administering devices that use ARM processors and those that do not. Those that
used ARM processors worked for longer and got discharged later than those that
did not work on ARM processors.
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 Advantages of ARM Processor
• Load store architecture – The processor uses load store architecture that
stores data in various registers (to reduce memory interactions). It has
separate load and store instructions that are used to transfer data
between external memory and register bank.
• Simple Circuits – ARM processors have simple circuits, hence they are very
compact and can be used in devices that are smaller in size (several
devices are becoming smaller and more compact due to customer
demands).
• Power efficiency: ARM processors are designed to be power-efficient,
which is important for mobile devices that are limited by battery life.
• Cost-effective: ARM processors are often less expensive than other types
of processors, which can make them a cost-effective choice for
manufacturers.
• Small size: ARM processors are smaller in size than other types of
processors, which makes them well-suited for use in small mobile devices.
• Scalability: ARM processors are scalable and can be used in a variety of
devices, from low-power devices such as wearables to high-performance
devices such as servers.

[Link] 19
 ARM Bus Technology
• Embedded systems use different bus
technologies than those designed for x86PCs.
• This type of technology is external or off-chip (i.e.
the bus is designed to connect mechanically and
electrically to devices external to the chip) and is
built in to the motherboard of a PC.
• In contrast, embedded devices use a non-chip
bus that is internal to the chip and that allows
different peripheral devices to be interconnected
with an ARM core.
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 ARM Bus Technology
A bus has two architecture levels.
• The first is a physical level that covers the
electrical characteristics and bus width
(16,32,or 64bits).
• The second level deals with protocol—the
logical rules that govern the communication
between the processor and a peripheral.

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 Advanced Microcontroller Bus
Architecture (AMBA)

[Link]

ASB (Advanced System Bus)

APB (Advanced Peripheral Bus)

AHB (Advanced High performance)

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 Evolution of AMBA bus protocols along
with the SOC design trends in industry

CHI (Coherent Hub

Interconnect)

[Link]
AXI (Advanced Extensible Interface) Point to point connectivity through master-slave protocol
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ACE (AXI Coherency Protocol Extension)
 ARM Bus Technology
• AMBA was introduced in 1996 and has been widely
adopted as the on-chip bus architecture used for ARM
processors.
• The first AMBA buses introduced were the ARM System
Bus(ASB) and the ARM Peripheral Bus (APB).
• After ARM introduced another bus design, called the ARM
High Performance Bus (AHB).
• Using AMBA, peripheral designers can reuse the same
design on multiple projects.
• A peripheral can simply be bolted on to the on-chip bus
without having to redesign an interface for each different
processor architecture.
• This plug-and-play interface for hardware developers
improves availability and time to market
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 Pipeline
• Pipeline means parallel working, this concept
speeds up execution by fetching the next
instruction while other instructions are being
decoded and executed.
• ARM7hasthreestagepipeline
➢Fetch-loads an instruction from memory.
➢Decode-identifies the instruction to be executed.
➢Execute-processes the instruction and writes the
result back to a register

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Pipeline

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Pipeline
• The three instructions are
placed into the pipeline
sequentially.
• In the first cycle the core
fetches the ADD instruction
from memory.
• In the second cycle the core
fetches the SUB instruction and
decodes the ADD instruction.
• In the third cycle, The ADD
instruction is in execute stage.
The SUB instruction is decoded,
and the CMP instruction is
fetched.
• This procedure is called filling
the pipeline

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 Merits & Demerits of Pipeline
• Advantages
– As the pipeline length increases, the amount of
work done at each stage is reduced. Which allows
the processor to attain a higher operating
frequency.
– This in turn increases the performance.
• Disadvantage
– The system latency increases because it takes
more cycles to fill the pipeline before the core can
execute an instruction.

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 Pipeline & Program Counter

• The ARM pipeline has not processed an instruction until

it passes completely through the execute stage.
• ARM7 pipeline (with three stages) has executed an
instruction only when the fourth instruction is fetched.
• In the execute stage, the pc always points to the address
of the instruction plus 8 bytes.
• the pc always points to the address of the instruction
being executed plus two instructions ahead. 29
 Characteristics of Pipeline
• The execution of a branch instruction or
branching by the direct modification of the pc
causes the ARM core to flush its pipeline.
• ARM10 uses branch prediction, which reduces
the effect of a pipeline flush by predicting
possible branches and loading the new branch
address prior to the execution of the instruction.
• An instruction in the execute stage will complete
even though an interrupt has been raised.
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ARM Nomenclature

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 Concluding remarks
• ARM is a RISC-style architecture used in majority of
the mobile devices (Due to is inherent support for
low-power).
• Learning to program in ARM is essential to develop
efficient embedded systems.
• Keil is software development environment for ARM
processors. It includes the complete development
toolchain like integrated development environment
(IDE), compiler, debugger and simulator.

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