PSIT, Kanpur
Computer Organization and Architecture (BCS302)
Input-Output Organization
Unit - 5 (Part - I)
Peripheral devices
I/O interface, I/O ports
Interrupts: Interrupt hardware, Types of interrupts
Peripheral devices
The input-output subsystem of a computer, provides an efficient mode of
communication between the central system and the outside environment.
Input-Output (I/O) Interface
I/O interface provides a method for transferring information between
internal storage and external I/O devices.
The major difference between the central computer and each peripheral are:
1. Peripherals are electro-mechanical and electromagnetic devices,
different from the CPU and memory, which are electronic devices.
2. The data transfer rate of peripherals is usually slower than the transfer
rate of the CPU.
3. Data codes and formats in peripherals differ from the word format in
the CPU and memory.
4. The operating modes of peripherals are different from each other.
To resolve these differences, computer systems include special hardware
components called interface units, between the CPU and peripherals to
supervise and synchronize all input and output transfers.
I/O Bus and Interface Modules
Compiled by- Durgesh Pandey (CSED)
PSIT, Kanpur
I/O Command
The function code is referred to as an I/O command.
The interpretation of the command depends on the peripheral that the
processor is addressing.
Four types of commands are classified as: control, status, data output, and data
input.
A control command is issued to activate the peripheral and to inform it
what to do.
E.g., a magnetic tape unit may be instructed to backspace the tape, to
rewind the tape, or to start the tape moving in the forward direction.
A status command is used to test various status conditions in the
interface and the peripheral.
E.g., the computer may wish to check the status of the peripheral before a
transfer is initiated.
A data output command causes the interface to respond by transferring
data from the bus into one of its registers.
The data input command is the opposite of the data output.
Compiled by- Durgesh Pandey (CSED)
PSIT, Kanpur
I/O versus Memory Bus
There are three ways that computer buses can be used to communicate with
memory and I/O:
1. Use two separate buses, one for memory and the other for I/O (by
providing a separate I/O processor (lOP)).
2. Use one common bus for both memory and I/O but have separate
control lines for each.
3. Use one common bus for memory and I/O with common control
lines.
Isolated I/O versus Memory-Mapped I/O
1. Isolated I/O method
Distinction between a memory transfer and I/O transfer is made through
separate read and write control lines i.e.
The I/O read and I/O write are enabled during an I/O transfer.
The memory read and memory write are enabled during a memory
transfer.
This configuration isolates all I/O interface addresses from the addresses
assigned to memory and is referred to as the isolated I/O method.
Figure: Isolated I/O method
Compiled by- Durgesh Pandey (CSED)
PSIT, Kanpur
2. Memory-mapped I/O method
The other alternative i.e. memory-mapped I/O uses the same address space
for both memory and I/O.
Employs only one set of read and write signals and do not distinguish
between memory and I/O addresses.
All instructions that refer to memory, are also available for I/O.
Figure: Memory mapped I/O method
Relative differences are listed in the following table-
Memory Mapped
Isolated I/O I/O
Memory and I/O have separate Both have same address
address space space
Due to addition of I/O,
All addresses can be used by addressable memory
the memory becomes less
Separate instructions to Same instructions can
control read and write control both I/O and
operations in I/O and Memory Memory
Compiled by- Durgesh Pandey (CSED)
PSIT, Kanpur
Memory Mapped
Isolated I/O I/O
Normal memory
I/O addresses are called ports addresses are for both
More efficient due to separate
buses Relatively less efficient
Larger in size due to more
buses Smaller in size
Simpler logic is used as
Complex; due to separate I/O is also treated as
logic is used to control both memory only
Interrupts
Interrupt is a process that allows the processor to suspend its current
execution and respond to external / internal requests.
External interrupts come from I/O devices, from a timing device, from a
circuit monitoring the power supply, or from any other external source.
o E.g., I/O device requesting transfer of data, I/O device finished
transfer of data, elapsed time of an event, or power failure.
Internal interrupts arise from illegal or erroneous use of an instruction
or data. Internal interrupts are also called traps.
o E.g. Interrupts caused by internal error conditions such as-
register overflow, attempt to divide by zero, an invalid operation code,
stack overflow, and protection violation.
Interrupts can take place to the processor in one of the two possible ways:
a) Programs written in computer memory
b) Through external peripherals
Depending upon the above, there are following types of interrupts:
Compiled by- Durgesh Pandey (CSED)
PSIT, Kanpur
Hardware Interrupts
An electronic signal sent from an external device or hardware to communicate
with the processor indicating that it requires immediate attention.
E.g., strokes from a keyboard or an action from a mouse.
Maskable Interrupts –
Processors have interrupt mask register that allows enabling and
disabling of hardware interrupts.
Every signal has a bit placed in the mask register. If this bit is set, an
interrupt is enabled & disabled when the bit is not set.
Non-Maskable Interrupts –
These are the highest priority activities that need to be processed
immediately under any situation, such as a timeout signal generated from
a timer.
Software Interrupts
The processor itself requests a software interrupt after executing certain
instructions or if particular conditions are met.
E.g., a specific instruction that triggers an interrupt such as subroutine calls
and can be triggered unexpectedly because of program execution errors,
known as exceptions or traps.
Compiled by- Durgesh Pandey (CSED)
PSIT, Kanpur
Vectored Interrupts
A device requesting an interrupt identifies itself directly by sending a special
code to the processor over the bus.
Devices are assigned an interrupt vector, a number that identifies a particular
interrupt handler.
This vector may be fixed, configurable (using jumpers or switches), or
programmable.
Non-Vectored interrupts
In this type of interrupt, the interrupt address is not known to the
processor so, the interrupt address needs to be sent externally by the device to
perform interrupts.
~~~~~~*****{Ӂ۞Ӂ}*****~~~~~~
Compiled by- Durgesh Pandey (CSED)