P2003EVG

P-Channel Logic Level Enhancement Mode MOSFET

PRODUCT SUMMARY
V(BR)DSS RDS(ON) ID

-30V 20mΩ @VGS = -10V -9A

SOP- 08
100% UIS tested

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS
Drain-Source Voltage VDS -30
V
Gate-Source Voltage VGS ±25
TA = 25 °C -9
Continuous Drain Current ID
TA = 70 °C -7
1
A
Pulsed Drain Current IDM -50
Avalanche Current IAS -27
Avalanche Energy L = 0.1mH EAS 36 mJ
TA = 25 °C 2.5
Power Dissipation PD W
TA = 70 °C 1.6
Operating Junction & Storage Temperature Range TJ, TSTG -55 to 150 °C

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS
Junction-to-Case RqJC 25
°C / W
Junction-to-Ambient RqJA 50
1
Pulse width limited by maximum junction temperature.

REV 1.1 1 2015/3/30

P2003EVG
P-Channel Logic Level Enhancement Mode MOSFET

ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted)

LIMITS
PARAMETER SYMBOL TEST CONDITIONS UNITS
MIN TYP MAX
STATIC
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = -250mA -30
V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = -250mA -1 -1.5 -3
Gate-Body Leakage IGSS VDS = 0V, VGS = ±25V ±100 nA
VDS = -24V, VGS = 0V -1
Zero Gate Voltage Drain Current IDSS mA
VDS = -20V, VGS = 0V , TJ = 125 °C -10
On-State Drain Current1 ID(ON) VDS = -5V, VGS = -10V 50 A
Drain-Source On-State VGS = -4.5V, ID = -7A 25 35
RDS(ON) mΩ
Resistance1 VGS = -10V, ID = -9A 15 20
Forward Transconductance1 gfs VDS = -10V, ID = -9A 24 S
DYNAMIC
Input Capacitance Ciss 1610
Output Capacitance Coss VGS = 0V, VDS = -15V, f = 1MHz 410 pF
Reverse Transfer Capacitance Crss 200
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz 3.7 Ω
2 Qg
Total Gate Charge 31.4
2
VDS = 0.5V(BR)DSS,
Gate-Source Charge Qgs 4.5 nC
ID = -9A, VGS = -10V
2 Qgd
Gate-Drain Charge 8.2
2 td(on)
Turn-On Delay Time 5.7
Rise Time 2 tr VDS = -15V, ID @ -1A, 10
nS
Turn-Off Delay Time 2 td(off) VGS = -10V,RL = 1Ω,RGS = 6Ω 18
Fall Time2 tf 5
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 °C)
Continuous Current IS -2.1 A
1 VSD IF = -1A, VGS = 0V
Forward Voltage -1.2 V
Diode Reverse Recovery Time trr 16 nS
IF= 2A, dI/dt=100A/ms
Diode Reverse Recovery Charge Qrr 7 nC
1
Pulse test : Pulse Width  300 msec, Duty Cycle  2％.
2
Independent of operating temperature.

REV 1.1 2 2015/3/30

P2003EVG
P-Channel Logic Level Enhancement Mode MOSFET

REV 1.1 3 2015/3/30

P2003EVG
P-Channel Logic Level Enhancement Mode MOSFET

REV 1.1 4 2015/3/30

P2003EVG
P-Channel Logic Level Enhancement Mode MOSFET

REV 1.1 5 2015/3/30