MODULE 1
8051 MICROCONTROLLER
Difference between microprocessor and microcontroller
8051 MICROCONTROLLER
8051 microcontroller is designed by Intel in 1981. These microcontrollers are named
as 80C51, where C in the name tells that it is based on CMOS technology. The main features
of 8051 microcontroller are;
• It is an 8-bit microcontroller.
• It is built with 40 pins DIP (dual inline package)
• 4kb of ROM storage (program memory)
• 128 bytes of RAM storage (data memory)
• two 16-bit timers.
• It consists of four parallel 8-bit ports
• on-chip crystal oscillator is integrated in the microcontroller having crystal
frequency of 12 MHz.
• Serial Data Tx & Rx for Full-Duplex Communication
8051 ARCHITECTURE
PROCESSOR STATUS WORD (PSW):
• This 8-bit PSW register contains 4 bits corresponding to the status of the last ALU
operation. Two more bits in it control the register bank to be used by the
instructions, one bit is available to the user for programming, while one bit is kept
undefined.
D0 - Parity Flag Bit: Set/cleared to indicate odd/even number of 1s in the accumulator.
D1 bit : Undefined
D2 Overflow Flag bit: Detects overflow in signed arithmetic operations, that is, result is
beyond –128 to +127 or a carry is present from 7th bit to eighth bit.
D3 RS0: D4 RS1
Register bank select:
D5 - Flag 0 (F0) the bit is available to the user.
D6 Auxiliary Carry: Set if there is a carry from bit-3 to bit-4 in addition or a borrow from
bit-4 to bit-3 in subtraction.
D7 Carry flag bit: Set if there is a carry/borrow in 8-bit addition/subtraction
Memory Organization
• The 8051 chip has 4kB on-chip program memory implemented using EPROM/flash
technology.
• It also has 128 byte data memory (RAM). Thus, the RAM location addresses range
over 00H to 7FH. However, beyond 7FH (and till 0FFH
DATA MEMORY (RAM)
• 128 byte data memory (RAM). divided into three sections
➢ Register Banks (00H to 1FH) (32 Bytes)
➢ Bit-Addressable RAM (20H to 2FH (16 Bytes)
➢ General Purpose RAM (30H to 7FH) (80 Bytes)
1. Register Banks (00H to 1FH):
• These are the lowest 32 bytes of RAM space grouped into 4 banks of 8
locations each. Each bank consists of registers R0, R1, R2, R3, R4, R5, R6 and
R7.
• At a time, only one bank of registers is active that can be used by the
instruction being executed. Activation of banks is controlled by two status
bits in the Processor Status Word (PSW) register.
• Instructions can use the name of a register or a memory address to refer to
an operand. For example, the RAM address 04H and register R4 in Bank-0
refer to the same memory location.
2. Bit-Addressable RAM (20H to 2FH):
• These are 16 memory locations of which individual bits can be referred to by the
bit-manipulating instructions. Such instructions can set/clear a bit, complement
it or check the value. Some of the Special Function Registers (SFRs), are also bit-
addressable.
3. General Purpose RAM (30H to 7FH):
• These 80 bytes of RAM locations could be used as general purpose storage
space by the programs. It may be noted that for most of the applications, a stack
space is needed for subprograms and interrupt handlers. The stack is also
sometimes implemented in this region. As a result, the remaining usable space
may be quite small.
PROGRAM MEMORY
• The 8051 chip has 4kB on-chip program memory implemented using
PROM/flash technology.
• The memory can be extended to 64K by adding external memory.
• External Access pin EA is used to configure external memory access as shown in
figure.