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Decoder

The document explains the functionality of decoders, specifically 2 to 4 and 3 to 8 decoders, which are combinational circuits that convert binary input combinations into active outputs. It includes truth tables and Boolean functions for each output, demonstrating how the outputs correspond to the min terms of the input variables. Additionally, it describes the implementation of these decoders using AND gates and inverters.

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0% found this document useful (0 votes)
2 views5 pages

Decoder

The document explains the functionality of decoders, specifically 2 to 4 and 3 to 8 decoders, which are combinational circuits that convert binary input combinations into active outputs. It includes truth tables and Boolean functions for each output, demonstrating how the outputs correspond to the min terms of the input variables. Additionally, it describes the implementation of these decoders using AND gates and inverters.

Uploaded by

ayshanur026
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2n output lines.

One of these outputs will be active High based on the combination of inputs present, when
the decoder is enabled. That means decoder detects a particular code. The outputs of the
decoder are nothing but the min terms of ‘n’ input variables.

2 to 4 Decoder
Let 2 to 4 Decoder has two inputs A1 & A0 and four outputs D3, D2, D1 & D0.
The block diagram of 2 to 4 decoder is shown in the following figure.
The Truth table of 2 to 4 decoder is shown below.

Inputs Outputs

A1 A0 D0 D1 D2 D3

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

From Truth table, we can write the Boolean functions for each output as
D3=A1.A0
D2=A1.A0′
D1=A1′.A0
D0=A1′.A0′
Each output is having one product term. So, there are four product terms in total.
We can implement these four product terms by using four AND gates having three
inputs each & two inverters. The circuit diagram of 2 to 4 decoder is shown in the
following figure.
Therefore, the outputs of 2 to 4 decoder are nothing but the min terms of two input
variables A1 & A0.
Similarly, 3 to 8 decoder produces eight min terms of three input variables A 2, A1 &
A0 and 4 to 16 decoder produces sixteen min terms of four input variables A 3, A2,
A1 & A0.

3 to 8 line Decoder:
Inputs Outputs
X Y Z D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
Truth Table

Characteristic Equation:

D0= X’.Y’.Z’

D1= X’.Y’.Z

D2=X’.Y.Z’

D3=X’.Y.Z

D4=X.Y’Z’

D5=X.Y’Z

D6=X.Y.Z’

D7=X.Y.Z

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