Module 4
Memory Management
Operating System Concepts
Memory Management
Memory is central to the operation of a modern computer
system.
Memory consists of a large array of bytes, each with its own
address.
The CPU fetches instructions from memory according to the
value of the program counter. These instructions may cause
additional loading from and storing to specific memory
addresses.
A typical instruction-execution cycle, for example, first fetches
an instruction from memory. The instruction is then decoded
and may cause operands to be fetched from memory. After the
instruction has been executed on the operands, results may
be stored back in memory.
Operating System Concepts
Memory Management
It is one of the most important functions of operating system
It helps system decide how to allocate memory to different
program and manage it efficiently
Allows sharing of memory spaces between processes, with
help of which multiple programs can consist at same memory
location.
Without proper memory management, it would run slow or
even crash
Operating System Concepts
Basic hardware
Main memory and the registers built into the processor itself are the
only general-purpose storage that the CPU can access directly.
There are machine instructions that take memory addresses as
arguments, but none that take disk addresses. Therefore, any
instructions in execution, and any data being used by the instructions,
must be in one of these direct-access storage devices.
Registers that are built into the CPU are generally accessible within
one cycle of the CPU clock.
The same cannot be said of main memory, which is accessed via a
transaction on the memory bus. Completing a memory access may
take many cycles of the CPU clock.
The remedy is to add fast memory between the CPU and main
memory, typically on the CPU chip for fast [Link], Cache.
Operating System Concepts
Basic hardware
Separate per-process address spaces prevent user processes from
accessing OS code or each other, essential for multiuser systems.
Hardware base and limit registers define legal address ranges: base
holds the starting physical address, and limit sets the allowable size,
trapping invalid accesses before OS intervention for performance.
• By using two registers,
• Base Register : holds the smallest legal
physical memory address
• Limit Register : specifies the size of the
range
• df
Operating System Concepts
Basic hardware
Protection of memory space is accomplished by having the CPU
hardware compare every address generated in user mode with the
registers.
Any attempt by a program executing in user mode to access
operating-system memory or other users’ memory results in a trap to
the operating system, which treats the attempt as a fatal error.
This scheme prevents a user program from (accidentally or
deliberately) modifying the code or data structures of either the
operating system or other users.
Operating System Concepts
Address Binding
A program resides on a disk as a binary executable file.
To be executed, the program must be brought into memory and
placed within a process.
The processes on the disk that are waiting to be brought into
memory for execution form the input queue.
User programs go through several steps before being run.
Addresses may be represented in different ways during these
steps.
Addresses in the source program are generally symbolic (such
as the variable count). A compiler typically binds these symbolic
addresses to relocatable addresses (such as “14 bytes from the
beginning of this module”).
Each binding is a mapping from one address space to another.
Operating System Concepts
Binding of Instructions and Data to Memory
Address binding of instructions and data to memory addresses can
happen at three different stages.
Compile time: If memory location known a priori,
absolute code can be generated; must recompile code if
starting location changes.
Load time: Must generate relocatable code if memory
location is not known at compile time.
Execution time: Binding delayed until run time if the
process can be moved during its execution from one
memory segment to another. Need hardware support for
address maps (e.g., base and limit registers).
Operating System Concepts
Multistep Processing of a User
Program
Operating System Concepts
Logical vs. Physical Address Space
The concept of a logical address space that is bound to a separate
physical address space is central to proper memory management.
Logical address – generated by the CPU; also referred to as virtual
address.
Physical address – address seen by the memory unit. Ie, the one
loaded into the memory-address register of the memory
Logical and physical addresses are the same in compile-time and
load-time address-binding schemes; logical (virtual) and physical
addresses differ in execution-time address-binding scheme.
The set of all logical addresses generated by a program is a
logical address space.
The set of all physical addresses corresponding to these logical
addresses is a physical address space.
Operating System Concepts
Memory-Management Unit (MMU)
The run-time mapping from virtual to physical addresses is done
by a hardware device called the memory-management unit
(MMU)
The base register is now called a relocation register.
In MMU scheme, the value in the relocation register is added to
every address generated by a user process at the time it is sent
to memory.
The user program deals with logical addresses; it never sees
the real physical addresses.
The user program deals with logical addresses. The memory-
mapping hardware converts logical addresses into physical
addresses.
Two different types of addresses: logical addresses (in the range
0 to max) and physical addresses (in the range R +0 to R +max
for a base value R).
Operating System Concepts
Dynamic relocation using a relocation register
For example, if the base is at 14000, then an attempt by the user to address
location 0 is dynamically relocated to location 14000; an access to location 346 is
mapped to location 14346.
Operating System Concepts
Dynamic Loading
It has been necessary for the entire program and all data of a
process to be in physical memory for the process to execute. The
size of a process has thus been limited to the size of physical
memory. To obtain better memory-space utilization, we can use
dynamic loading.
With dynamic loading, Routine is not loaded until it is called
All routines are kept on disk in a relocatable load format.
Better memory-space utilization; unused routine is never loaded.
Useful when large amounts of code are needed to handle
infrequently occurring cases.
No special support from the operating system is required
implemented through program design.
Operating System Concepts
Dynamic Linking
Dynamically linked libraries are system libraries that are
linked to user programs when the programs are run.
static linking, in which system libraries are treated like any
other object module and are combined by the loader into the
binary program image.
Dynamic linking, in contrast, is similar to dynamic loading.
linking, rather than loading, is postponed until execution
time.
This feature is usually used with system libraries, such as
language subroutine libraries.
Without this facility, each program on a system must include a
copy of its language library (or at least the routines referenced
by the program) in the executable image.
This requirement wastes both disk space and main memory.
Operating System Concepts
Dynamic Linking
Small piece of code, stub, used to locate the appropriate
memory-resident library routine.
When the stub is executed, it checks to see whether the needed
routine is already in memory. If it is not, the program loads the
routine into memory.
Either way, the stub replaces itself with the address of the
routine and executes the routine.
Thus, the next time that particular code segment is reached, the
library routine is executed directly, incurring no cost for dynamic
linking.
Under this scheme, all processes that use a language library
execute only one copy of the library code.
Operating system needed to check if routine is in processes’
memory address.
Dynamic linking is particularly useful for libraries.
Operating System Concepts
Overlays
Keep in memory only those instructions and data that are
needed at any given time.
Needed when process is larger than amount of memory
allocated to it.
Implemented by user, no special support needed from
operating system, programming design of overlay structure is
complex
Operating System Concepts
Overlays for a Two-Pass Assembler
Operating System Concepts
Swapping
A process can be swapped temporarily out of memory to a backing
store, and then brought back into memory for continued execution.
Standard swapping involves moving processes between main memory
and a backing store.
The system maintains a ready queue consisting of all processes
whose memory images are on the backing store or in memory and are
ready to run.
Whenever the CPU scheduler decides to execute a process,it calls the
dispatcher.
The dispatcher checks to see whether the next process in the queue is
in memory.
If it is not, and if there is no free memory region, the dispatcher swaps
out a process currently in memory and swaps in the desired process.
It then reloads registers and transfers control to the selected process.
Operating System Concepts
Swapping
Backing store – fast disk large enough to accommodate copies of all
memory images for all users; must provide direct access to these
memory images.
Roll out, roll in – swapping variant used for priority-based scheduling
algorithms; lower-priority process is swapped out so higher-priority
process can be loaded and executed.
Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped.
Modified versions of swapping are found on many systems, i.e., UNIX,
Linux, and Windows.
swapping is normally disabled but will start if the amount of free
memory (unused memory available for the operating system or
processes to use) falls below a threshold amount. Swapping is halted
when the amount of free memory increases. Another variation involves
swapping portions of processes—rather than entire processes—to
decrease swap time.
Operating System Concepts
Swapping
Processes must be fully idle before swapping, especially
avoiding those with pending I/O to prevent conflicts—swapped-
out memory could overlap with incoming I/O buffers.
Solutions include never swapping I/O-bound processes or using
OS buffers for I/O, with double buffering to copy data post-swap-
in (adding overhead).
Ties to dynamic linking: both optimize resource sharing, but
swapping risks disrupting shared library access.
Operating System Concepts
Schematic View of Swapping
Operating System Concepts
Contiguous Allocation
Main memory usually into two partitions:
Resident operating system, usually held in low memory with
interrupt vector.
User processes then held in high memory.
Single-partition allocation
Relocation-register scheme used to protect user processes from
each other, and from changing operating-system code and data.
Relocation register contains value of smallest physical address;
limit register contains range of logical addresses – each logical
address must be less than the limit register.
Operating System Concepts
Hardware Support for Relocation and Limit Registers
Operating System Concepts
Contiguous Allocation (Cont.)
Multiple-partition allocation
Hole – block of available memory; holes of various size are
scattered throughout memory.
When a process arrives, it is allocated memory from a hole
large enough to accommodate it.
Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
OS OS OS OS
process 5 process 5 process 5 process 5
process 9 process 9
process 8 process 10
process 2 process 2 process 2 process 2
Operating System Concepts
Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes.
First-fit: Allocate the first hole that is big enough.
Best-fit: Allocate the smallest hole that is big enough;
must search entire list, unless ordered by size.
Produces the smallest leftover hole.
Worst-fit: Allocate the largest hole; must also search
entire list. Produces the largest leftover hole.
First-fit and best-fit better than worst-fit in terms of
speed and storage utilization.
Operating System Concepts
Fragmentation
External Fragmentation – total memory space exists to
satisfy a request, but it is not contiguous.
Internal Fragmentation – allocated memory may be
slightly larger than requested memory; this size difference
is memory internal to a partition, but not being used.
Reduce external fragmentation by compaction
Shuffle memory contents to place all free memory together
in one large block.
Compaction is possible only if relocation is dynamic, and is
done at execution time.
I/O problem
Latch job in memory while it is involved in I/O.
Do I/O only into OS buffers.
Operating System Concepts
Paging
Logical address space of a process can be noncontiguous;
process is allocated physical memory whenever the latter is
available.
Divide physical memory into fixed-sized blocks called frames
(size is power of 2, between 512 bytes and 8192 bytes).
Divide logical memory into blocks of same size called pages.
Keep track of all free frames.
To run a program of size n pages, need to find n free frames
and load program.
Set up a page table to translate logical to physical addresses.
Internal fragmentation.
Operating System Concepts
Address Translation Scheme
Address generated by CPU is divided into:
Page number (p) – used as an index into a page table which
contains base address of each page in physical memory.
Page offset (d) – combined with base address to define the
physical memory address that is sent to the memory unit.
Operating System Concepts
Address Translation Architecture
Operating System Concepts
Paging Example
Operating System Concepts
Paging Example
Operating System Concepts
Free Frames
Before allocation After allocation
Operating System Concepts
Implementation of Page Table
Page table is kept in main memory.
Page-table base register (PTBR) points to the page table.
Page-table length register (PRLR) indicates size of the
page table.
In this scheme every data/instruction access requires two
memory accesses. One for the page table and one for
the data/instruction.
The two memory access problem can be solved by the
use of a special fast-lookup hardware cache called
associative memory or translation look-aside buffers
(TLBs)
Operating System Concepts
Associative Memory
Associative memory – parallel search
Page # Frame #
Address translation (A´, A´´)
If A´ is in associative register, get frame # out.
Otherwise get frame # from page table in memory
Operating System Concepts
Paging Hardware With TLB
Operating System Concepts
Effective Access Time
Associative Lookup = time unit
Assume memory cycle time is 1 microsecond
Hit ratio – percentage of times that a page number is
found in the associative registers; ration related to
number of associative registers.
Hit ratio =
Effective Access Time (EAT)
EAT = (1 + ) + (2 + )(1 – )
=2+–
Operating System Concepts
Memory Protection
Memory protection implemented by associating protection
bit with each frame.
Valid-invalid bit attached to each entry in the page table:
“valid” indicates that the associated page is in the process’
logical address space, and is thus a legal page.
“invalid” indicates that the page is not in the process’ logical
address space.
Operating System Concepts
Valid (v) or Invalid (i) Bit In A Page Table
Operating System Concepts
Page Table Structure
Hierarchical Paging
Hashed Page Tables
Inverted Page Tables
Operating System Concepts
Hierarchical Page Tables
Break up the logical address space into multiple page
tables.
A simple technique is a two-level page table.
Operating System Concepts
Two-Level Paging Example
A logical address (on 32-bit machine with 4K page size) is
divided into:
a page number consisting of 20 bits.
a page offset consisting of 12 bits.
Since the page table is paged, the page number is further
divided into:
a 10-bit page number.
a 10-bit page offset.
Thus, a logical address is as follows:
page number page offset
pi p2 d
10 10 12
where pi is an index into the outer page table, and p2 is the
displacement within the page of the outer page table.
Operating System Concepts
Two-Level Page-Table Scheme
Operating System Concepts
Address-Translation Scheme
Address-translation scheme for a two-level 32-bit paging
architecture
Operating System Concepts
Hashed Page Tables
Common in address spaces > 32 bits.
The virtual page number is hashed into a page table. This
page table contains a chain of elements hashing to the
same location.
Virtual page numbers are compared in this chain
searching for a match. If a match is found, the
corresponding physical frame is extracted.
Operating System Concepts
Hashed Page Table
Operating System Concepts
Inverted Page Table
One entry for each real page of memory.
Entry consists of the virtual address of the page stored in
that real memory location, with information about the
process that owns that page.
Decreases memory needed to store each page table, but
increases time needed to search the table when a page
reference occurs.
Use hash table to limit the search to one — or at most a
few — page-table entries.
Operating System Concepts
Inverted Page Table Architecture
Operating System Concepts
Shared Pages
Shared code
One copy of read-only (reentrant) code shared among
processes (i.e., text editors, compilers, window systems).
Shared code must appear in same location in the logical
address space of all processes.
Private code and data
Each process keeps a separate copy of the code and data.
The pages for the private code and data can appear
anywhere in the logical address space.
Operating System Concepts
Shared Pages Example
Operating System Concepts
Segmentation
Memory-management scheme that supports user view of
memory.
A program is a collection of segments. A segment is a logical
unit such as:
main program,
procedure,
function,
method,
object,
local variables, global variables,
common block,
stack,
symbol table, arrays
Operating System Concepts
User’s View of a Program
Operating System Concepts
Logical View of Segmentation
4
1
3 2
4
user space physical memory space
Operating System Concepts
Segmentation Architecture
Logical address consists of a two tuple:
<segment-number, offset>,
Segment table – maps two-dimensional physical
addresses; each table entry has:
base – contains the starting physical address where the
segments reside in memory.
limit – specifies the length of the segment.
Segment-table base register (STBR) points to the
segment table’s location in memory.
Segment-table length register (STLR) indicates number of
segments used by a program;
segment number s is legal if s < STLR.
Operating System Concepts
Segmentation Architecture (Cont.)
Relocation.
dynamic
by segment table
Sharing.
shared segments
same segment number
Allocation.
first fit/best fit
external fragmentation
Operating System Concepts
Segmentation Architecture (Cont.)
Protection. With each entry in segment table associate:
validation bit = 0 illegal segment
read/write/execute privileges
Protection bits associated with segments; code sharing
occurs at segment level.
Since segments vary in length, memory allocation is a
dynamic storage-allocation problem.
A segmentation example is shown in the following
diagram
Operating System Concepts
Segmentation Hardware
Operating System Concepts
Example of Segmentation
Operating System Concepts
Sharing of Segments
Operating System Concepts
Segmentation with Paging – MULTICS
The MULTICS system solved problems of external
fragmentation and lengthy search times by paging the
segments.
Solution differs from pure segmentation in that the
segment-table entry contains not the base address of the
segment, but rather the base address of a page table for
this segment.
Operating System Concepts
MULTICS Address Translation Scheme
Operating System Concepts
Segmentation with Paging – Intel 386
As shown in the following diagram, the Intel 386 uses
segmentation with paging for memory management with a
two-level paging scheme.
Operating System Concepts
Intel 30386 Address Translation
Operating System Concepts