SEMICONDUCTOR PHYSICS

Additional Problems, Formulas & Definitions

PART 1: ADDITIONAL NUMERICAL PROBLEMS

PROBLEM 4: Temperature Coefficient of Conductivity

Question: A semiconductor has a band gap of 1 eV. Calculate the ratio of conductivities at 400K and 300K.
Assume the conductivity depends on temperature as σ = σ0 × T^(3/2) × exp(-Eg/2kT). (k = 8.617 × 10■■
eV/K)

Solution:
Given:
T1 = 300 K
T2 = 400 K
Eg = 1 eV
k = 8.617 × 10■■ eV/K
σ ∝ T^(3/2) × exp(-Eg/2kT)

The ratio of conductivities:

σ(400K) / σ(300K) = [T2/T1]^(3/2) × exp[-Eg/2k × (1/T2 - 1/T1)]

Step 1: Calculate temperature ratio:

(400/300)^(3/2) = (4/3)^(3/2) = (1.333)^(3/2) = 1.5396

Step 2: Calculate exponent term:

Eg/2k = 1 / (2 × 8.617 × 10■■) = 5800.4 K

(1/T2 - 1/T1) = (1/400 - 1/300) = 0.00250 - 0.00333 = -0.00083 K■¹

Exponent = -5800.4 × (-0.00083) = 4.814

exp(4.814) = 123.1

Therefore:
σ(400K) / σ(300K) = 1.5396 × 123.1 = 189.4

Answer: The conductivity at 400K is approximately 189 times greater than at 300K. This shows the strong
temperature dependence of semiconductor conductivity.

PROBLEM 5: Electron-Hole Pair Generation

Question: At room temperature (300K), silicon has an intrinsic carrier concentration of ni = 1.5 × 10¹■ cm■³.
If silicon is doped with ND = 10¹■ cm■³ donor atoms, calculate:
(a) The electron concentration ne
(b) The hole concentration nh
(c) The product ne × nh

Solution:
Given:
ni = 1.5 × 10¹■ cm■³
ND = 10¹■ cm■³

(a) Electron Concentration (ne):

For n-type semiconductor: ne ≈ ND (charge neutrality)
Since ND >> ni, we have:
ne ≈ ND = 10¹■ cm■³

(b) Hole Concentration (nh):

Using mass action law: ne × nh = ni²
nh = ni² / ne = (1.5 × 10¹■)² / (10¹■)
nh = 2.25 × 10²■ / 10¹■
nh = 2.25 × 10■ cm■³ = 22,500 cm■³

(c) Product ne × nh:

ne × nh = 10¹■ × 2.25 × 10■ = 2.25 × 10²■ cm■■
This equals ni² = (1.5 × 10¹■)² = 2.25 × 10²■ cm■■ ✓

Key Observations:
• Electron concentration (majority carrier) is very large: 10¹■ cm■³
• Hole concentration (minority carrier) is very small: 2.25 × 10■ cm■³
• Ratio ne/nh = 10¹■ / 2.25 × 10■ ≈ 4.4 × 10¹¹ (electrons >> holes)
• The product ne × nh is constant and equals ni² (independent of doping)

PROBLEM 6: P-N Junction Built-in Potential

Question: A silicon p-n junction has NA = 10¹■ cm■³ (acceptor concentration in p-side) and ND = 10¹■
cm■³ (donor concentration in n-side). Calculate the built-in potential V0 at room temperature (300K). (ni =
1.5 × 10¹■ cm■³, k = 8.617 × 10■■ eV/K, q = 1.6 × 10■¹■ C)

Solution:
Given:
NA = 10¹■ cm■³
ND = 10¹■ cm■³
ni = 1.5 × 10¹■ cm■³
T = 300 K
k = 8.617 × 10■■ eV/K

The built-in potential is given by:

V0 = (kT/q) × ln(NA × ND / ni²)

Or in electron volts:
V0 = (kT) × ln(NA × ND / ni²)

Step 1: Calculate kT (in eV):

kT = 8.617 × 10■■ × 300 = 0.02585 eV

Step 2: Calculate NA × ND:

NA × ND = 10¹■ × 10¹■ = 10³¹ cm■■

Step 3: Calculate ni²:

ni² = (1.5 × 10¹■)² = 2.25 × 10²■ cm■■

Step 4: Calculate ratio:

NA × ND / ni² = 10³¹ / (2.25 × 10²■) = 4.44 × 10¹■

Step 5: Calculate natural logarithm:

ln(4.44 × 10¹■) = ln(4.44) + 10 × ln(10)
= 1.492 + 10 × 2.303 = 1.492 + 23.03 = 24.52

Step 6: Calculate V0:

V0 = 0.02585 × 24.52 = 0.634 V
Answer: The built-in potential is approximately 0.63 V. This is the equilibrium potential difference across the
depletion region at zero applied voltage.

PROBLEM 7: Depletion Width Calculation

Question: For the p-n junction in Problem 6, calculate the depletion width W when no external voltage is
applied. Given: εr = 12 (relative permittivity of Si), ε0 = 8.854 × 10■¹■ F/cm, q = 1.6 × 10■¹■ C

Solution:
Given:
NA = 10¹■ cm■³
ND = 10¹■ cm■³
V0 = 0.634 V (from Problem 6)
εr = 12
ε0 = 8.854 × 10■¹■ F/cm
q = 1.6 × 10■¹■ C

The depletion width at zero bias is given by:

W = √[2ε■εr(NA + ND) × V0 / (q × NA × ND)]

Step 1: Calculate ε■εr:

ε■εr = 8.854 × 10■¹■ × 12 = 1.062 × 10■¹² F/cm

Step 2: Calculate NA + ND:

NA + ND = 10¹■ + 10¹■ = 1.1 × 10¹■ cm■³

Step 3: Calculate numerator:

2 × ε■εr × (NA + ND) × V0
= 2 × 1.062 × 10■¹² × 1.1 × 10¹■ × 0.634
= 1.484 × 10■ F·V/cm

Step 4: Calculate denominator:

q × NA × ND = 1.6 × 10■¹■ × 10¹■ × 10¹■
= 1.6 × 10¹² C·cm■³

Step 5: Calculate W:
W = √[1.484 × 10■ / 1.6 × 10¹²]
= √[9.275 × 10■■]
= 3.045 × 10■■·■ cm
= 0.305 µm or 3050 Å

Answer: The depletion width is approximately 0.3 µm. This represents the extent of the space-charge region
where mobile carriers have been depleted.

PROBLEM 8: Forward Bias Current

Question: A silicon p-n junction at 300K has a saturation current I0 = 10■¹■ A. Calculate the forward current
when:
(a) Applied forward voltage V = 0.3 V
(b) Applied forward voltage V = 0.5 V
(c) Applied forward voltage V = 0.7 V
Use the Shockley diode equation: I = I0(e^(qV/kT) - 1) where kT/q = 0.0259 V at 300K

Solution:
Given:
I0 = 10■¹■ A
T = 300 K
kT/q = 0.0259 V

Using: I = I0(e^(V/0.0259) - 1)

(a) For V = 0.3 V:

I = 10■¹■ × [e^(0.3/0.0259) - 1]
= 10■¹■ × [e^11.58 - 1]
= 10■¹■ × [1.066 × 10■ - 1]
= 10■¹■ × 1.066 × 10■
= 1.066 × 10■■ A = 1.066 nA

(b) For V = 0.5 V:

I = 10■¹■ × [e^(0.5/0.0259) - 1]
= 10■¹■ × [e^19.31 - 1]
= 10■¹■ × [2.45 × 10■ - 1]
= 2.45 × 10■■ A = 2.45 µA

(c) For V = 0.7 V:

I = 10■¹■ × [e^(0.7/0.0259) - 1]
= 10■¹■ × [e^27.03 - 1]
= 10■¹■ × [7.64 × 10¹¹ - 1]
= 7.64 × 10■³ A = 7.64 mA

Key Observations:
• Even small increase in voltage (0.3V → 0.7V, i.e., 0.4V change) causes 7.16 × 10■ times increase in
current
• This exponential relationship is characteristic of p-n junction diodes
• Current becomes significant (> 1 mA) around 0.6-0.7V for silicon (turn-on voltage)
PART 2: IMPORTANT FORMULAS

Topic Formula Description

Fermi-Dirac Distribution f(E) = 1 / [1 + e^((E-EF)/kT)] Probability of state occupation

Thermal Voltage VT = kT/q = 0.0259 V (at 300K) Thermal energy in electrical units

Boltzmann Constant k = 8.617 × 10■■ eV/K Energy-temperature conversion

Intrinsic Carrier Conc. ni² = NCCNV exp(-Eg/kT) Product of electron & hole conc.

Fermi Level (Intrinsic) EF = Eg/2 + (3kT/4)ln(mh*/me*) Fermi level in pure semiconductor

Fermi Level (N-type) EF = EC - kT ln(NC/ND) Fermi level in n-type doped SC

Fermi Level (P-type) EF = EV + kT ln(NV/NA) Fermi level in p-type doped SC

Conductivity σ = neµe + nhµh Total conductivity equation

Built-in Potential V0 = (kT/q)ln(NAND/ni²) Equilibrium potential across J.

Depletion Width W = √[2ε■εr(NA+ND)V0/(qNAND)] Width of depletion region

Junction Capacitance Cj = ε■εrA / W Capacitance of depletion region

Shockley Equation I = I0(e^(qV/kT) - 1) Forward/reverse bias current

Saturation Current I0 = qni²(Dn/LnND + Dp/LpNA) Reverse saturation current

Diffusion Length Ln = √(Dnτn), Lp = √(Dpτp) Carrier diffusion length

Temperature Coeff. σ ∝ T^(3/2) exp(-Eg/2kT) Conductivity vs temperature

PART 3: KEY DEFINITIONS AND CONCEPTS

1. SEMICONDUCTOR
A semiconductor is a material having electrical conductivity between that of a conductor and an insulator. At
zero absolute temperature, the valence band is completely filled and the conduction band is completely
empty. At room temperature, thermal energy allows some electrons to jump to the conduction band, making
the material slightly conductive. The conductivity can be dramatically increased by doping with impurities.

2. ENERGY BAND (OR BAND)

An energy band is a continuous range of energy levels allowed for electrons in a solid material. When atoms
are brought close together to form a solid, their discrete energy levels split into bands separated by forbidden
regions (band gaps). Two important bands are: (a) Valence Band - containing valence electrons, normally
filled at 0K; (b) Conduction Band - higher energy band where electrons can move freely, normally empty at
0K.

3. BAND GAP (Eg)

The band gap is the energy difference between the top of the valence band and the bottom of the conduction
band. It represents the minimum energy required to excite an electron from the valence band to the
conduction band. For silicon at 300K, Eg = 1.12 eV. The band gap decreases with increasing temperature.

4. FERMI LEVEL (EF)

The Fermi level is the energy level at which the probability of occupation by an electron is exactly 50%. At
absolute zero, it represents the highest occupied energy level. The Fermi level shifts with temperature and
doping. In an intrinsic semiconductor, it lies at the middle of the band gap. In an n-type semiconductor, it
shifts toward the conduction band. In a p-type semiconductor, it shifts toward the valence band.

5. VALENCE ELECTRONS
Valence electrons are electrons in the outermost shell of an atom. For group IV elements (Si, Ge), there are
four valence electrons. These electrons are responsible for chemical bonding and determine the electrical
properties of the material. In semiconductors, valence electrons can be excited to the conduction band to
create mobile charge carriers.

6. ELECTRON-HOLE PAIR
An electron-hole pair is created when thermal or photonic energy is sufficient to excite a valence electron to
the conduction band, leaving behind a vacant site (hole) in the valence band. Both the electron and hole are
free to move and contribute to electrical conduction. The generation and recombination of electron-hole pairs
determines carrier concentration and conductivity.

7. HOLE
A hole is the absence of an electron in a covalent bond in a semiconductor. It acts as a positive charge
carrier with charge +e. When an electron from a neighboring atom moves to fill the hole, the hole appears to
move in the opposite direction. The motion of holes under electric field is equivalent to the motion of positive
charges.

8. INTRINSIC SEMICONDUCTOR
An intrinsic (or pure) semiconductor is a semiconductor without any added impurities. In its pure form, the
number of free electrons equals the number of holes, and both arise from thermal generation of electron-hole
pairs. The conductivity of an intrinsic semiconductor is very low at room temperature and increases
dramatically with temperature.

9. EXTRINSIC SEMICONDUCTOR
An extrinsic (or doped) semiconductor is formed when controlled amounts of impurities are added to an
intrinsic semiconductor. If pentavalent (donor) impurities are added, it becomes n-type. If trivalent (acceptor)
impurities are added, it becomes p-type. The conductivity of extrinsic semiconductors can be many orders of
magnitude higher than intrinsic semiconductors due to increased carrier concentration.

10. N-TYPE SEMICONDUCTOR

N-type (Negative-type) semiconductor is formed by doping an intrinsic semiconductor with pentavalent
impurities (Group V elements: P, As, Sb). The extra electron from the pentavalent impurity becomes a mobile
charge carrier. Electrons are majority carriers, and holes are minority carriers. The fermi level lies close to
the conduction band.

11. P-TYPE SEMICONDUCTOR

P-type (Positive-type) semiconductor is formed by doping an intrinsic semiconductor with trivalent impurities
(Group III elements: B, Al, Ga, In). The missing fourth electron creates a hole that acts as a mobile positive
charge carrier. Holes are majority carriers, and electrons are minority carriers. The fermi level lies close to
the valence band.

12. P-N JUNCTION

A p-n junction is formed when p-type and n-type semiconductors are brought into contact. It forms the basis
of diodes, transistors, and most semiconductor devices. The junction exhibits rectifying properties: allowing
easy current flow in forward direction (p connected to +, n to -) and blocking current in reverse direction. A
depletion region forms at the junction due to diffusion and drift of carriers.

13. DEPLETION REGION

The depletion region is a narrow region at a p-n junction depleted of mobile carriers. It contains only fixed,
ionized impurity atoms (positive ions on n-side, negative ions on p-side). This charge distribution creates an
electric field (built-in field) that opposes further diffusion. The depletion width typically ranges from 0.1 to 1
micrometer and varies with applied voltage and doping concentration.

14. BUILT-IN POTENTIAL (V0)

The built-in potential (or contact potential) is the equilibrium potential difference across a p-n junction at zero
applied voltage. It arises from the accumulation of fixed charges in the depletion region. For silicon at room
temperature, V0 ≈ 0.6-0.7 V. It opposes further diffusion of majority carriers and drives drift of minority
carriers.

15. FORWARD BIAS

Forward bias is the condition where the external voltage applied to a p-n junction opposes the built-in
potential, thereby lowering the barrier and allowing majority carriers to flow easily. The positive terminal is
connected to the p-region and the negative terminal to the n-region. This produces exponentially increasing
current with voltage.
16. REVERSE BIAS
Reverse bias is the condition where the external voltage applied to a p-n junction adds to the built-in
potential, thereby increasing the barrier and blocking majority carriers. The positive terminal is connected to
the n-region and the negative terminal to the p-region. Only minority carriers drift across, producing a very
small saturation current nearly independent of applied voltage.

17. SCHOTTKY BARRIER

A Schottky barrier is the potential barrier formed at a metal-semiconductor interface. It arises from the
difference in work functions between metal and semiconductor. The barrier height (typically 0.3-0.8 eV for Si)
is lower than the semiconductor band gap. Schottky diodes exploit this barrier for rectification with lower
forward voltage drop and faster switching than p-n junction diodes.

18. CLIPPING CIRCUIT

A clipping circuit is a diode-based waveform shaping circuit that removes (clips) a predetermined portion of
the input signal above or below a reference level, without distorting the remaining part. Series clippers place
the diode in series with the output. Parallel (shunt) clippers place the diode in parallel with the output. The
diode acts as a dynamic switch to pass or block the signal.

19. CLAMPING CIRCUIT

A clamping circuit (or DC restorer) is a diode circuit that adds a DC component to an AC signal, shifting its
DC level without changing its AC shape. The capacitor stores charge during one half-cycle and releases it
during the next half-cycle, causing the entire waveform to move up (positive clamper) or down (negative
clamper). Used for DC level shifting and signal restoration in communication systems.

20. SATURATION CURRENT (I0)

The saturation current (or reverse saturation current) is the small current that flows through a reverse-biased
p-n junction. It is due to drift of minority carriers across the depletion region. For silicon diodes at room
temperature, I0 ≈ 10■¹■ - 10■¹² A. It increases exponentially with temperature and is one of the most
important parameters in the Shockley diode equation for circuit design.