Interrupts
What are the predefined interrupts in 8086:
Interrupt is the method of creating a temporary halt during program execution and allows
peripheral devices to access the microprocessor. The microprocessor responds to that interrupt
with an ISR (Interrupt Service Routine), which is a short program to instruct the
microprocessor on how to handle the interrupt.
The following image shows the types of interrupts we have in an 8086 microprocessor -
Hardware Interrupts
Hardware interrupt is caused by any peripheral device by sending a signal through a
specified pin to the microprocessor.
The 8086 has two hardware interrupt pins, i.e. NMI and INTR. NMI is a non-maskable
interrupt and INTR is a maskable interrupt having lower priority. One more interrupt pin
associated is INTA called interrupt acknowledge.
NMI
It is a single non-maskable interrupt pin (NMI) having higher priority than the maskable
interrupt request pin (INTR)and it is of type 2 interrupt.
When this interrupt is activated, these actions take place −
• Completes the current instruction that is in progress.
• Pushes the Flag register values on to the stack.
• Pushes the CS (code segment) value and IP (instruction pointer) value of the return
address on to the stack.
• IP is loaded from the contents of the word location 00008H.
• CS is loaded from the contents of the next word location 0000AH.
• Interrupt flag and trap flag are reset to 0.
INTR
The INTR is a maskable interrupt because the microprocessor will be interrupted only if
interrupts are enabled using set interrupt flag instruction. It should not be enabled using clear
interrupt Flag instruction.
The INTR interrupt is activated by an I/O port. If the interrupt is enabled and NMI is
disabled, then the microprocessor first completes the current execution and sends 0 on INTA
pin twice. The first 0 means INTA informs the external device to get ready and during the
second 0 the microprocessor receives the 8 bits, say X, from the programmable interrupt
controller.
These actions are taken by the microprocessor −
• First completes the current instruction.
• Activates INTA output and receives the interrupt type, say X.
• Flag register value, CS value of the return address and IP value of the return address
are pushed on to the stack.
• IP value is loaded from the contents of word location X × 4
• CS is loaded from the contents of the next word location.
• Interrupt flag and trap flag is reset to 0
Software Interrupts
Some instructions are inserted at the desired position into the program to create interrupts.
These interrupt instructions can be used to test the working of various interrupt handlers. It
includes −
INT- Interrupt instruction with type number
It is 2-byte instruction. First byte provides the op-code and the second byte provides the
interrupt type number. There are 256 interrupt types under this group.
Its execution includes the following steps −
• Flag register value is pushed on to the stack.
• CS value of the return address and IP value of the return address are pushed on to the
stack.
• IP is loaded from the contents of the word location type number × 4
• CS is loaded from the contents of the next word location.
• Interrupt Flag and Trap Flag are reset to 0
The starting address for type0 interrupt is 000000H, for type1 interrupt is 00004H similarly
for type2 is 00008H and so on. The first five pointers are dedicated interrupt pointers. i.e. −
• TYPE 0 interrupt represents division by zero situation.
• TYPE 1 interrupt represents single-step execution during the debugging of a program.
• TYPE 2 interrupt represents non-maskable NMI interrupt.
• TYPE 3 interrupt represents break-point interrupt.
• TYPE 4 interrupt represents overflow interrupt.
The interrupts from Type 5 to Type 31 are reserved for other advanced microprocessors,
and interrupts from 32 to Type 255 are available for hardware and software interrupts.
INT 3-Break Point Interrupt Instruction
It is a 1-byte instruction having op-code is CCH. These instructions are inserted into the
program so that when the processor reaches there, then it stops the normal execution of program
and follows the break-point procedure.
Its execution includes the following steps −
• Flag register value is pushed on to the stack.
• CS value of the return address and IP value of the return address are pushed on to the
stack.
• IP is loaded from the contents of the word location 3×4 = 0000CH
• CS is loaded from the contents of the next word location.
• Interrupt Flag and Trap Flag are reset to 0
INTO - Interrupt on overflow instruction
It is a 1-byte instruction and their mnemonic INTO. The op-code for this instruction is
CEH. As the name suggests it is a conditional interrupt instruction, i.e. it is active only when
the overflow flag is set to 1 and branches to the interrupt handler whose interrupt type number
is 4. If the overflow flag is reset then, the execution continues to the next instruction.
Its execution includes the following steps −
• Flag register values are pushed on to the stack.
• CS value of the return address and IP value of the return address are pushed on to the
stack.
• IP is loaded from the contents of word location 4×4 = 00010H
• CS is loaded from the contents of the next word location.
• Interrupt flag and Trap flag are reset to 0
8086 Interrupt Execution:
1. Complete current instruction.
2. Checks for any internal interrupt. (No)
3. Checks for NMI i.e. hardware interrupt. (No)
4. Check for INTR interrupt. (No)
5. In absence of INTR, it will continue checking for TF (Trap, single step) flag.
6. If TF is not equal to 1, it will switch over to next instruction.
7. Else for INTR, it checks for IF flag
8. If IF = 1, then it will execute “interrupt acknowledge” and captures “Type Code”.
9. After capturing the “type code”, the next sequence will be executed which is common
to all interrupts.
10. It decrements SP by 2 and pushes the flag register on the stack.
[SP-1] Higher Byte of Flag,
[SP-2] Lower Byte of Flag
11. Temp = TF (Save present status of TF)
12. Disables INTR by clearing the IF (IF = 0).
13. It resets the TF in the flag Register (TF = 0).
14. It decrements SP by 2 and pushes old CS on the stack.
[SP-3] Higher Byte of CS
[SP-4] Lower Byte of CS.
15. It decrements SP by 2 and pushes old IP on the stack.
[SP-5] Higher Byte of IP
[SP-6] Lower Byte of IP.
16. Fetch the ISR address from the interrupt vector table and CALL interrupt service
routine. (New CS: New IP).
17. Before transferring control to New CS: New IP again check for NMI. If yes, it will
jump to point (a), else check for Temp.
18. If Temp = TF = 1, i.e. single step is activated, then MP jumps to point (a)
19. But if Temp = TF = 0, it will execute USER interrupt procedure, i.e. ISR written by
user.
20. At the end of ISR, user will write IRET i.e. return from interrupt.
21. In response to IRET, MP will Pop up old CS, old IP and Flags.
Difference Between Hardware Interrupt and Software Interrupt:
In a computer system, an interrupt is a signal that temporarily halts the CPU's current
activities to give attention to something more urgent. This helps the computer respond quickly
to important events. In this, we are going to discuss what is hardware and software interrupts,
and the difference between hardware and software interrupts in detail.
What is Hardware Interrupt?
Hardware Interrupt is caused by some hardware device such as a request to start an I/O, a
hardware failure, or something similar. Hardware interrupts were introduced as a way to avoid
wasting the processor's valuable time in polling loops and waiting for external events.
For example, when an I/O operation is completed such as reading some data into the computer
from a tape drive.
• An interrupt is generated by a mouse when a button is clicked
• An interrupt is generated by a network card when data is received
• An interrupt is generated by a disk drive when a read or write operation is completed
What is Software Interrupt?
A software interrupt is a mechanism used by software to signal the processor that it needs
its attention. It is a way for a program to request a service from the operating system or to signal
an event.
Software Interrupt is invoked by the use of INT instruction. The INT instruction in
assembly language is used to trigger a software interrupt. It stands for "interrupt" and is
followed by a number that specifies which interrupt to trigger. This event immediately stops
the execution of the program and passes execution over to the INT handler. The INT handler is
usually a part of the operating system and determines the action to be taken. It occurs when an
application program terminates or requests certain services from the operating system.
For example, output to the screen, execute file, etc.
• A system calls to read or write data to a file
• A page fault exception
Hardware Interrupt Software Interrupt
Hardware interrupt is an interrupt Software interrupt is the interrupt that is
generated from an external device or generated by any internal system of the
hardware. computer.
It does not increment the program It increments the program counter.
counter.
Hardware interrupt can be invoked with Software interrupt can be invoked with the help
some external device such as request to of INT instruction.
start an I/O or occurrence of a hardware
failure.
It has lowest priority than software It has highest priority among all interrupts.
interrupts
Hardware interrupt is triggered by Software interrupt is triggered by software and
external hardware and is considered one considered one of the ways to communicate with
of the ways to communicate with the kernel or to trigger system calls, especially
outside peripherals, hardware. during error or exception handling.
It is an asynchronous event. It is synchronous event.
Hardware interrupts can be classified into Software interrupts can be classified into two
two types they are: types they are:
1. Maskable Interrupt. 1. Normal Interrupts.
2. Non Maskable Interrupt. 2. Exception
Keystroke depressions and mouse All system calls are examples of software
movements are examples of hardware interrupts
interrupt.
Conclusion
Hardware and software interrupts allow the CPU to perform specific tasks, they have
different sources, triggers, handling mechanisms, and latencies. By understanding the
differences between hardware and software interrupts, developers and system administrators
can optimize system performance and troubleshoot issues more effectively.
Subroutine Program in 8086:
A subroutine in 8086 is a small program (block of instructions) that performs a specific
task and can be called from the main program whenever needed. It is also called a procedure.
Instead of writing the same code again and again, we write it once as a subroutine and call
it whenever required.
➢ A subroutine is a reusable block of code.
➢ It is called using CALL instruction.
➢ It returns using RET instruction.
➢ Stack is used to store return address.
A subroutine is executed using two main instructions:
CALL instruction
Transfers control from main program to subroutine.
Saves return address in the stack automatically.
RET instruction
Returns control back to the main program.
Retrieves return address from the stack.
How Subroutine Works Internally
1. Main program executes CALL SUB
2. Address of next instruction is pushed into stack
3. Control jumps to subroutine
4. Subroutine executes its task
5. RET instruction pops address from stack
6. Control returns to main program
Why Subroutines are Used
➢ Avoid code repetition
➢ Make program modular
➢ Reduce program size
➢ Easy debugging
➢ Improve readability
Basic Structure in 8086 Subroutine:
MAIN PROGRAM
CALL SUB1
-----
-----
SUB1 PROC
Instructions
RET
SUB1 END
Write an assembly language program which can Enable or Disable
Interrupts:
; Program to Enable and Disable Interrupts in 8086
.MODEL SMALL ; Defines memory model.
; SMALL model = one code segment + one data segment
.STACK 100H ; Reserves stack memory, i.e 100H = 256 bytes stack space
.CODE ; Indicates beginning of code segment
MAIN PROC ; Declares start of the main procedure
CLI ; Disable interrupts
NOP ; No operation (delay / dummy instruction)
NOP ; No operation
STI ; Enable interrupts
MOV AH, 4CH ; DOS function to terminate program
INT 21H ; Call DOS interrupt
MAIN ENDP ; Marks end of MAIN procedure
END MAIN ; Indicates entry point of program
8086 assembly language program that uses an Interrupt in Execution:
(1) Program to demonstrates the use of DOS interrupt INT 21H to display a
character and terminate the program.
.MODEL SMALL ; Defines memory model.
; SMALL model = one code segment + one data segment
.STACK 100H ; Reserves stack memory, i.e 100H = 256 bytes stack space
.DATA ; Starts data segment
MSG DB 'A' ; Defines one byte variable. Stores character A
.CODE ; Indicates beginning of code segment
MAIN PROC ; Declares start of the main procedure
MOV AX, [DATA] ; Loads address of data segment into AX
MOV DS, AX ; Initializes DS register. Required before accessing data
MOV DL, MSG ; Moves character ‘A’ into DL register
MOV AH, 02H ; Selects function 02H of INT 21H
; Function 02H = Display character stored in DL
INT 21H ; Main Interrupt Call
• Calls DOS interrupt service.
• Uses function number in AH.
• Displays the string on screen.
MOV AH, 4CH ; Function to terminate program
INT 21H ; Returns control to DOS
MAIN ENDP ; Marks end of MAIN procedure
END MAIN ; Indicates entry point of program
(2) Program to displays a message on the screen using a software interrupt.
.MODEL SMALL ; Defines memory model.
; SMALL model = one code segment + one data segment
.STACK 100H ; Reserves stack memory, i.e 100H = 256 bytes stack space
.DATA ; Starts data segment
MSG DB 'HELLO WORLD$', 0 ; Declares a string. $ is string terminator required by INT
21H function 09H.
.CODE ; Indicates beginning of code segment
MAIN PROC ; Declares start of the main procedure
MOV AX, [DATA] ; Loads address of data segment into AX
MOV DS, AX ; Initializes DS register. Required before accessing data
MOV AH, 09H ; Selects DOS interrupt function.
; Function 09H = Display string on screen
LEA DX, MSG ; Loads effective address of string into DX.
; DX must contain address of string for this interrupt
INT 21H ; Main Interrupt Call
• Calls DOS interrupt service.
• Uses function number in AH.
• Displays the string on screen.
MOV AH, 4CH ; Function to terminate program
INT 21H ; Returns control to DOS
MAIN ENDP ; Marks end of MAIN procedure
END MAIN ; Indicates entry point of program
(3) 8086 Assembly Program to read a character from the keyboard and display it
on the screen.
CODE SEGMENT ; Starts the code segment
ASSUME CS:CODE ; Tells assembler that Code Segment register (CS) points to
CODE
START:
MOV AH, 01H ; Function 01H of INT 21H → Read character from keyboard
INT 21H ; Calls DOS interrupt, User presses a key → ASCII value stored
in AL register
MOV BL, AL ; Save the input character from AL into BL
MOV AH, 02H ; Function 02H = Display a character on screen
MOV DL, 0DH ; 0DH = Carriage Return (cursor goes to line start)
INT 21H ; Executes the carriage return
MOV DL, 0AH ; 0AH = Line Feed (move cursor to next line)
INT 21H ; Moves cursor to new line
MOV AH, 02H ; Select display character function again
MOV DL, BL ; Moves saved character from BL into DL for display
INT 21H ; Displays the character on screen
MOV AH, 4CH ; Function 4CH → Terminate program
INT 21H ; Return control to DOS
MAIN ENDP ; Marks end of MAIN procedure
END MAIN ; Indicates entry point of program
Interrupt Vector Table (IVT):
Interrupt Vector Table (IVT) is the link between interrupt type code and the procedure that
has been designed to service interrupts associated with that code.
IVT is a structured list containing the addresses of Interrupt Service Routine (ISR) for
various interrupts It is also known as Interrupt Pointer Table (IPT).
• INT N where, N Type Number = 0 to 255 i.e. 256 Software Interrupts
• IVT should have the addresses of ISR for 256 interrupts.
• Physical Address (20 bits in size), Code Segment -2 bytes (16 bits in size) and
Instruction Pointer = 2 bytes (16 bits in size)
Physical Address (PA) = Code Segment (CS) * 10H + Instruction Pointer (IP)
PA = CS * 10H+ IP
• So, there is unique 256 interrupts ISR addresses.
• 256 interrupts = 256 * 4=1024 bytes=1KB is located in the starting part of memory.
• Address range will be CS: IP=0000:0000 to 0000:03FFH