Experiment 4

American International University- Bangladesh (AIUB)

Department of Electrical and Electronic Engineering
EEE3102: Digital Logic and Circuits Laboratory

Title: Designing Multiplexer (MUX) and De-multiplexer (DEMUX), Priority Encoder and Decoder
Circuits

Introduction:
In this experiment, students will learn how to design and implement multiplexers (MUX) and
demultiplexers (De-MUX) of different sizes using basic logic gates. They will also learn how to construct
bigger multiplexer using smaller multiplexers. Students will also construct encoder and decoder circuits.
Encoder and decoder circuits are very useful in information transmission, conversion, compression and
maintaining the secrecy of any information.

Theory and Methodology:

Part I: Multiplexer and De-multiplexer

A multiplexer (or mux) is a device that selects one of several inputs and forwards the selected input into
a single line. A multiplexer of 2n inputs has n selection lines, which are used to select which input has to
be sent to the output. A multiplexer is also called a data selector.

A de-multiplexer (or de-mux) is a device taking a single input and selecting one of many data-output-
lines, which is connected to the single input.

Multiplexer:
n a computer system, selecting data from one of multiple sources is often necessary. Suppose we have two
data sources, provided as input signals I0 and I1. These signals can change over time, possibly at regular
intervals. We aim to design a circuit that outputs the same value as either I0 or I1, depending on the value
of a single selection pin S.
Since we have one selection pin, there are two possible combinations:
• If S = 0, the output Y = I0
• If S = 1, the output Y = I1
The relationship between the number of inputs and selection pins follows a general rule:
If a multiplexer has n selection pins, it can handle 2ⁿ inputs. A 2-to-1 MUX has one selection pin and two
inputs. Similarly, other multiplexers include 4-to-1, 8-to-1, and so on.

Table: 1
S Y
0 I0
1 I1

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 From the truth table, we derive the Boolean expression for the output:

Y = S̅ I0 + S I1

This equation represents the logic function of a 2-to-1 multiplexer, where the selection pin determines
which input is passed to the output.

The logic circuit of the equation (1) is given in figure 1.

Fig. 1: 2 to 1 Multiplexer

De-multiplexer:

A demultiplexer (DEMUX) is the opposite of a multiplexer. It takes a single input and routes it to one of
multiple outputs based on the value of selection pins. The remaining outputs remain low (inactive).
Depending on the number of outputs, demultiplexers are categorized as 1-to-2, 1-to-4, 1-to-8, etc. If a
demultiplexer has n selection pins, it can have a maximum of 2ⁿ outputs.

For a 1-to-2 DEMUX, we have:

• One data input (Din)

• One selection pin (S)
• Two outputs (I0 and I1)

The selection pin determines which output receives the input signal Din, while the other remains low.

The truth table for a 1-to-2 DEMUX is as follows:

S Y0 Y1
0 Din 0
1 0 Din

From this truth table, the Boolean expressions for the outputs are:

Y0 = S̅ .Din
Y1=S⋅Din

This represents the logic function of a 1-to-2 demultiplexer, where the selection pin S determines which
output receives the input signal.

© Dept. of EEE, Faculty of Engineering, American International University-Bangladesh (AIUB) 2

 Fig. 2: 1-to-2 line De-multiplexer

Part II: Encoder and Decoder:

An encoder is a device or a circuit that converts information from one format or code to another. A decoder
does the reverse operation of the encoder. It undoes the encoding so that the original information can be
retrieved. Both the encoder and decoder are combinational circuits.

Encoding and decoding are very widely used ideas. They have applications in electronic circuits, software
programs, medical devices, telecommunication and many others. In this experiment, a very basic 2-to-4
line decoder and a decimal to BCD encoder will be constructed.
A decoder can convert binary information from n input lines to a maximum of 2n unique output lines. The
2-to-4 line decoder will take inputs from two lines and convert them to 4 lines.

A B

D0

D1

D2

D3

Fig. 3: 2-to-4 line decoder

The expressions for implementing 2-to-4 line decoder are

𝐷0 = 𝐴̅𝐵̅ (6)
𝐷1 = 𝐴̅𝐵 (7)
𝐷2 = 𝐴𝐵̅ (8)
𝐷3 = 𝐴𝐵 (9)
© Dept. of EEE, Faculty of Engineering, American International University-Bangladesh (AIUB) 3
 Truth table for 2-to-4 line decoder is given below –

A B D0 D1 D2 D3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

Priority encoder:
A priority encoder is a circuit or algorithm that compresses multiple binary inputs into a smaller number
of outputs. The output of a priority encoder is the binary representation of the original number starting
from zero of the most significant input bit. They are often used to control interrupt requests by acting on
the highest priority request. If two or more inputs are given at the same time, the input having the highest
priority will take precedence.

In this experiment a 4-to 2 priority encoder with a priority sequence of 2,1,3,0 has been shown. It means,
in this priority encoder 2 has the highest priority and 0 has the lowest. If 2 is high then other numbers are
ignored (even if any of them are high at the same time) and output would be binary representation of 2,
i.e., Y1Y0=10. If 2 is found to be low, then next priority is given to 1. So, in this case if 1 is high, then 3
and 0 are ignored and output will be binary representation of 1, i.e., Y1Y0=01 and so on.

Fig. 4: 4-to 2 priority encoders with a priority sequence of 2,1,3,0

The expressions for implementing the above priority encoder–

Y0 = A2’.A1 + A3.A2’.A1’ Y1 = A2 + A3.A2’.A1’

Truth table for this priority encoder is given below –

A3 A2 A1 A0 Y1 Y0
x 1 x x 1 0
x 0 1 x 0 1
1 0 0 x 1 1
0 0 0 1 0 0

Pre-Lab Homework:
Read about the characteristics of encoder and decoder circuits from any book or websites and use PSIM
to generate the output of the circuits provided in this lab sheet. Save the simulation results and bring it to
the lab.

© Dept. of EEE, Faculty of Engineering, American International University-Bangladesh (AIUB) 4

 Apparatus:
1. NOT Gate - IC 7404 1 [pc]
2. AND Gate - IC 7408 1 [pc]
3. OR Gate - 5 input OR 1 [pc]
4 input OR 2 [pcs]
2 input OR 1 [pc]

Precautions:
1. Make sure that all the LEDs and the toggle switches of the trainer board are working properly.
2. Do not short any connections. Short connection can produce heat (due to high current flow) which
is harmful for the components.

Experimental Procedure:

1. Connect the circuit according to the figures.

2. Use the toggle switches on the trainer board for providing input signal to the circuits. Connect the
outputs to the LEDs on the trainer board.
3. Apply the input signals and observe and note the corresponding output signals.

Simulation and Measurement:

Compare the simulation results with your experimental data and comment on the differences (if any).

Results/ Findings:
Students will implement the circuit in the Trainer Board and match the theoretically obtained truth table
by matching outputs for individual input configurations. If the practically obtained truth table does not
match they will also investigate the errors.

Report Question:
1. Design and implement a BCD (Binary-Coded Decimal) Encoder using simulation software.
2. Design and implement an 8-to-1 Multiplexer (MUX) using simulation software.
References:
[1] Thomas L. Floyd, “Digital Fundamentals” 9th edition, Prentice Hall.
[2] M. Morris Mano, “Digital Logic & Computer Design” Prentice Hall.

© Dept. of EEE, Faculty of Engineering, American International University-Bangladesh (AIUB) 5