Reactive Power Compensation Capability of a

STATCOM based on Two Types of Modular Multilevel

Cascade Converters for Offshore Wind Application
1,2
Authors Name/s per 2nd Takaaki Tanaka
Affiliation (Author), Huai Wang1, Ke Ma3, Frede Blaabjerg1
1
Department
line 1 (of Affiliation): dept. nameofofEnergy Technology, Aalborg University, Aalborg East, Denmark
organization
2
R&D Headquarters,
line 2-name of organization, acronyms acceptable Fuji Electric Co., Ltd, Tokyo, Japan
line 33-City,
Shanghai Jiao Tong4-e-mail
Countryline University, School
address of Electronics Information and Electrical Engineering, Shanghai, China
if desire

Abstract— Static Synchronous Compensators (STATCOMs) voltage-balancing control has been investigated theoretically in
have been applied for offshore wind power plants to satisfy the [6].
grid codes under both normal operation and grid fault
conditions. This paper investigates the performances of two types However, these voltage-balancing methods result in
of Modular Multilevel Cascade Converters (MMCC) for increased voltage and current stresses of power modules and
STATCOM applications, with the special focus on asymmetrical thereby may compromise the reactive power compensation
Low-Voltage-Ride-Through (LVRT) operation under grid faults. capability of the MMCCs when they are practically designed
The design of an 80 MVar / 33 kV STATCOM is first presented. for wind farms. The choice of suitable MMCC topology and
The electro-thermal stress of the power modules used in each optimize design for wind farm STATCOM applications is still
type of MMCC is analyzed with voltage balancing control under an open question to be investigated.
grid faults. Finally, the reactive power compensation capability of
the MMCC solutions is compared under different scenarios of In this paper, the two types of MMCCs with SSBC and
grid faults, with considerations of the device temperature limits. SDBC, respectively for the STATCOM application are
comprehensively compared based on a practical 80MVar / 33
Keywords—MMCC, STATCOM, Asymmetrical grid faults, kV case study. Firstly, the specifications and the component
LVRT, Reactive power compensation capability, Wind power plant sizing of the STATCOM are presented. Secondly, the electro-
thermal stresses of power modules used in each type of SSBC
I. INTRODUCTION and SDBC is analyzed with voltage-balancing control under
grid faults. Finally, the reactive power compensation capacity
The wind power generation continues to grow in the last focused on the MMCC solutions with SSBC and SDBC is
decade with a 487 GW installed capacity, including 14.4 GW compared under different scenarios of grid faults, with the
from offshore wind turbines, by the end of 2016. Reactive consideration of device temperature limits.
power compensators such as STATCOM have been installed in
offshore wind power plants with long-distance submarine
cables to fulfill the grid codes for renewable energy generation II. THE SYSTEM CONFIGURATION AND GRID FAULT
under both normal operation and grid fault conditions [1], [2]. SCENARIOS
Fig.1 shows the system configuration of a typical offshore
Modular Multilevel Cascade Converter (MMCC) family
wind power plant and the MMCC-based STATCOM. The
could be suitable solutions for the STATCOM used in wind
generated active power from the offshore wind farm needs to
power plants. They have significant advantages compared to
be sent to the Point of Common Coupling (PCC) as Bus A (400
the conventional voltage source converters: such as easily
kV in this case) by a HVAC transmission system (220 kV in
scaled-up power and voltage ratings, lower harmonic
this case) with long distance submarine cables. Reactive power
distortions, transformer-less configuration at medium voltage
induced by the submarine cable is compensated by the full-
level, and modular/ redundancy design, etc. Nevertheless,
voltage-balancing for large number of DC-link capacitors in
Offshore
cells are challenging to be achieved for MMCCs, especially wind farm HVAC transmission system External grid
under the asymmetrical grid faults [3].
Bus D (33kV) Bus B(220kV) Bus A (400kV)
Several voltage-balancing control methods with
asymmetrical grid voltage for MMCCs have been proposed,
Submarine ZS
although they are not targeted to the STATCOM applications. cable TR1
For example, zero-sequence voltage injection method for TR2
MMCCs with single Star Bridge Cells (SSBC) [4], zero- Bus C ZF
(33kV)
sequence current injection method for Single Delta Bridge Shoreline Shunt MMCC
Cells (SDBC) [5], circulating current or zero-sequence voltage reactor STATCOM
Fault
injection method for Double Star Chopper Cells (DSCC). Note: It is assumed that neutral points of Y connection of transformer are connected to ground.
Furthermore, the zero-sequence component injection for Fig. 1. The system configuration and MMCC for the case study.

978-1-5090-5157-1/17/$31.00 ©2017 IEEE 326

scale converters of wind turbines, the shunt reactor, and the
STATCOM connected to Bus B via a delta-star transformer.
The STATCOM should also fulfill the Low-Voltage-Ride-
Through (LVRT) requirement for wind turbines as shown in
Fig.2, keeping connected to the grid under various grid faults
and injecting reactive current to support the grid. Other power
generators and loads besides the wind power plant may be also
connected to Bus A.
It is assumed that a short-circuit fault happens somewhere
on a feeder with the line impedance ZF to Bus A (PCC). The
line impedance from the PCC to the grid with a higher voltage
level is Zs. Define that the voltage dip severity on PCC, which
is related to the power line impedance. Other feeders connected Fig. 2. Grid codes of wind turbines under LVRT by different countries
[1].
to Bus A are neglected except the fault feeder in this divider
model. Therefore, the dip severity on the PCC (or Bus A) DA TABLE I. PHASOR DIAGRAMS AND VECTOR DEFINITIONS OF
DIFFERENT GRID FAULT SCENARIOS ON PCC
can be written as
Phasor diagrum
Fault types Vecter deffinitions
ZF deffinitions
DA = (1) Vu _ pu = D A
ZS + ZF
(a) 1 3
Vv _ pu = − D A − j
VSw_pu
Table 1 shows the phasor diagram and vector definitions of Three-phase
VSu_pu DA
2 2
different grid fault scenarios on Bus A using the dip severity fault VSv_pu

DA. Here, in order to simplify the grid fault scenarios, the line 1 3
Vw _ pu = − D A + j DA
impedance values are considered only positive-sequence 2 2
component [7]. This result corresponds with some part of the Vu _ pu = D A
IEEE std. 1668-2014 and IEC std. 61000-4-34. (b) 1 3
Single-phase
Vv _ pu = − − j
In this paper, three asymmetrical grid fault scenarios are 2 2
fault
chosen as shown in Table 1 (b), (c) and (d). The test voltage is 1 3
applied at Bus B because Bus A and Bus B voltages does not Vw _ pu = − + j
2 2
appear significant difference under the asymmetrical grid faults Vu _ pu = 1
due to the used neutral point grounded wye-wye-delta
transformer TR1. However, the voltage dip on Bus B will (c) 1 3
VSw_pu VSu_pu Vv _ pu = − − j DA
shows different characteristics when it is propagated to Bus C, Phase-to-phase VSv_pu 2 2
fault
which is seen by the STATCOM due to the used delta-wye 1 3
transformer TR2. Vw _ pu = − + j DA
2 2
Vu _ pu = 1
III. SPECIFICATIONS OF THE STATCOM CASE
(d) 1 3
A 80 MVar / 33 kV case study for a practical STATCOM
VSw_pu VSu_pu
Vv _ pu = − D A − j DA
Two-phase-to- 2 2
VSv_pu
application is chosen in this paper. Figs. 5 show the MMCC ground fault
1 3
configuration with SSBC and SDBC, with the same power Vw _ pu = − D A + j DA
2 2
capacity (± 80 MVar) and voltage rating (33 kVrms). Table 2
shows the specifications, the cell number and key components. Note: No phase jump is assumed, i.e. DA regards scalar quantity.
The design procedure is shown below.
modules. On the other hand, SDBC and DSCC topologies
1) Basic structure: Due to the comparison, the rated DC- need more power devices with lower current ratings.
link voltage and output AC voltage for each converter cell are 2) Modulation type and frequencies for PWM: Phase-shift
designed to be the same at 2600 Vdc and 1450 Vrms PWM modulation is chosen because of the advantage that the
(modulation factor α is 0.8), respectively. The margin of the electro-thermal stresses of the IGBT modules and capacitors
modulation factor 0.2 is assigned the voltage drop by output are equally distributed among cells in same cluster (or arm).
impedance, current control dynamics, pulse width limitation Equivalent switching frequency of the MMCC feq_sw is
by dead time, modular redundancy. The total cell number Ncell, designed to be the same at 6.5 kHz. In this result, carrier
total number of switching devices Nsw and rated output current frequency fc of the MMCC solutions with SSBC and SDBC
in each cell Ir are calculated using mentioned parameters. 4.5 are 250 Hz and 140 Hz, respectively.
kV IGBT modules are selected with different current rating 3) Interconnection inductance: In this case study, the Lac
depending on the cell currents. It is noted that the SSBC is designed at 6 % of nomilized inductance based on 33 kV, 80
topology has the minimum number of cells and power MVA, and 50 Hz operating conditions. The total enargy stored
modules while requiring highest current capacity of the in the whole interconnection inductor EL is same value among
the MMCC solutions in this designed gudeline.

327
 4) DC-link capacitance: The DC-link capacitance of each Bus C (33kV)
cell Cx is designed as capacitor voltage ripple scaled by DC-
link voltage reference value Vc* (2600V). The voltage iu Lac iv iw

ripple % ΔVc is designed as 10% under nominal rated vun vvn vwn

operation. The relationship between the voltage ripple and the Cell u1 Cell v1 Cell w1

capacitance Cx of the MMCC solutions with SSBC and SDBC Dax Dcx
Cell u2 Cell v2 Cell w2
are expressed by (2) based on an averaging model [5]. Sax Scx
2αI r u phase v phase w phase
vx
Cx = (2) cluster cluster cluster vCx Cx
2ω s %VCVC
*
Sbx Sdx
Cell u13 Cell v13 Cell w13
Dbx Ddx
Here, α is a modulation factor of a cell which is set at α =1 䈜x means from u1 to w13
n
assuming the largest voltage ripple in this case study. The total
energy stored in whole dc-link capacitors EC among the (a) SSBC
MMCC solutions is compared when each capacitor voltage is
set as 2600V. It is noted that EC between SSBC and SDBC is
the same.
IV. PERFORMANCE BENCHMARK OF THE MMCC
SOLUTIONS

A. Electrical and thermal simulation of the MMCC-SSBC

Fig.4 shows the key waveforms of the MMCC-SSBC under
the asymmetrical grid fault scenarios with the dip severity DB
of 0.4 p.u. simulated by software PLECS. It is noted that the (b) SDBC
output current is controlled by dual-frames control scheme [1].
Fig. 3. The MMCC configurations for the cese study.
Zero-sequence voltage is injected for DC-link capacitor
voltages balancing between phases as shown [4]. The reactive
TABLE II. THE MMCC SPECIFICATIONS FOR THE CASE STUDY.
current reference is set at rated 1 p.u. of the positive-sequence
only in this simulation, considering that recent grid codes do Circuit type of MMCC SSBC SDBC
not require negative sequence current to compensate the Rated power Qr㻌 s80 MVA
asymmetrical grid voltage, however this feature may become a
future requirement [8]. The peak value of the voltage 33 kVrms
Rated line-to-line
reference increases by 22% maximum on w phase cluster (Source angular frequency ωs :
voltage Vs
under single-phase-to-ground fault in order to inject zero- 2π™50 rad/s)
sequence voltage vzero to balance the DC-link capacitor Nominal cell voltage DC2600V, AC1450V
voltages of the converter cells.
Fig.4 also shows the junction temperatures of four IGBTs Equivalent switching
6.5 kHz (with Phase Shift PWM)
frequency feq_sw
and diodes in each cell of u1, v1 and w1 under the same
condition. The junction temperatures are also simulated by 39 69
Total cells Ncell
PLECS. The electrical-loss parameter and thermal impedance ( 13 cells/cluster ) ( 23 cells/cluster )
between junction and heatsink based on Foster RC network Total switching
are selected from the datasheets for the power modules. 156 276
devices Nsw
Because the temperature of the heatsink is normally much
lower and more stable compared with the junction temperature Rated output current
1400 Arms 808 Arms
each cell Ir
in a properly designed converter system, the heat sink
temperature is considered as a constant value at 60Υ in this Carrier frequency fc 250 Hz 140 Hz
paper. However, the heat sink temperature may strongly Total energy stored in
depend on the operation site and the design of the heat sink 15 kJ 15 kJ
interconnection
( Lac = 2.6 mH ) ( Lac = 7.8 mH )
system. The peak junction temperature of IGBT and Diode are inductor a) EL
103 Υ and 101 Υ , respectively and do not show significant Total energy stored in 1600 kJ 1600 kJ
different value under the different grid fault scenarios. This dc-link capacitor b) EC ( Cx = 12 mF ) ( Cx = 7.0 mF )
temperatures are below the limit of 128 Υ by considering a
MBN1500FH45F MBN900D45A
15 % margin for the IGBT modules with a maximum IGBT module
(4500V/1500A) (4500V/900A)
temperature rating of 150 Υ.
a) Lac is designed at 6% of %L based on 33kV, 80MVA, and 50Hz.
Fig.5 shows the maximum peak voltage command and the b) Cx is designed at 10% ripple of DC-link voltage.
peak junction temperature of the IGBT and Diode among the

328
 (on Bus B) (V) 200k vSu
Test voltage

vSu vSv vSw vSu vSv vSw

vSv vSw
0

-200k
40k
vun vvn
PWM voltage

vun vvn vwn vun vvn

20k vwn vwn
(V)

0
-20k
40k
Output current

2k iu iv iw iu iv iw iu iv iw
(A)

-2k

1
DC-link capacitor Voltage command

v*u1-13 v*v1-13 v*u1-13 v*v1-13

v*w1-13 v*u1-13 v*v1-13
value (p.u.)

v*w1-13 v*w1-13
0
v*zero v*zero
v*zero
-1

2.8k vcv1-13 vcw1-13 vcu1-13 vcv1-13 vcu1-13 vcv1-13 vcw1-13

voltage (V)

vcu1-13 vcw1-13
2.6k

2.4k

0 10m 20m 30m 40m 0 10m 20m 30m 40m 0 10m 20m 30m 40m
Time[sec] Time[sec] Time[sec]
Temperature limitation: 128 (150 ×0.85)
130
Junction temperature [䉝]

120
110 IGBT: 103䉝 peak IGBT: 103䉝 peak IGBT: 103䉝 peak IGBT: 104䉝 peak IGBT: 104䉝 peak IGBT: 103䉝 peak IGBT: 103䉝 peak IGBT: 104䉝 peak IGBT: 103䉝 peak
100
90
80 Diode: 101䉝 peak Diode: 100䉝 peak Diode: 99䉝 peak Diode: 100䉝 peak Diode: 99䉝 peak Diode: 100䉝 peak Diode: 100䉝 peak Diode: 99䉝 peak Diode: 100䉝 peak

70
u1 cell v1 cell w1 cell u1 cell v1 cell w1 cell u1 cell v1 cell w1 cell
60
2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0
Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec]

(a) Single-phase fault (b) Phase-to-phase fault (c) Two-phase-to-ground fault

Fig. 4. Key waveforms of the MMCC-SSBC under ansynmetrical grid fault conditions with the dip severity DB of 0.4pu.
130
1.0
[ ]

Temperature limitation Tmax:

temperature[Υ]

120
Peak voltage command [p.u.]
[p.u]

0.9 128Υ (=150Υ㽢0.85)

junctiontemperature

0.8 110 IGBT

0.7
0.6 100
0.5 Diode
90
Peak junction

0.4
0.3 Single-phase fault 80 Phase-to-phase fault
0.2 Phase-to-phase fault Two-phase-to-ground fault
Peak

70
0.1 Two-phase-to-ground fault Single-phase fault
0.0 60
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Dip severity
Dip severity on
on PCC DBB [p.u.]
PCC D [p.u.] Dip severity on PCC DB [p.u.]
(a) Peak voltage command (b) Peak junction temperature
Fig. 5. Peak voltage command and junction temperature of the MMCC-SSBC under ansynmetrical grid faults regarding the dip severity DB.

cells regarding the dip severity on Bus B DB. It can be noted be noted that the peak value of cluster current increases by
that the peak voltage command saturates with single-phase maximum 52% at v and w cluster under phase-to-phase fault in
fault condition at DB = 0.4 p.u.. The maximum peak junction order to inject zero-sequence current izero to balance the DC-
temperature of IGBT and Diode are approximately 104 °C and link capacitor voltages of the converter cells.
100 °C, respectively, regardless the grid conditions.
Fig.6 also shows the junction temperatures of four IGBTs
and diodes in the cells u1, v1 and w1. The junction
B. Electrical and thermal simulation of the MMCC-DSBC temperatures are simulated as well. The peak junction
Fig.6 shows the simulated key waveforms of the MMCC- temperature increase by maximum 121Υ at the diodes of v1
SDBC under asymmetrical grid faults with the dip severity DB and w1 cells. This temperatures are over the limit of 106Υ by
0.4 p.u.. In this case, zero-sequence current is injected for DC- considering a 15 % margin for the IGBT modules with a
link capacitor voltages balancing as discussed in [5]. Other maximum temperature rating of 125Υ.
simulation conditions are the same as the MMCC-SSBC. It can

329
 (on Bus B) (V) 200k
Test voltage

vSu vSv vSw vSu vSv vSw vSu vSv vSw

0

-200k

50k vuv
PWM voltage

vvn vwn vvn vwn

vvn vwn vun vun
(V)

50k
Output current

2k
iu iv iw iu iv iw iu iv iw
(A)

-2k
DC-link capacitor Voltage command Cluster current

2k iuv ivw iwu ivw iwu ivw iwu

iuv iuv
(A)

-2k i*zero i*zero i*zero

1
v*u1-13 v*v1-23 v*w1-23 v*v1-23 v*w1-23
value (p.u.)

v*v1-13 v*w1-13 v*u1-23

v*u1-23
0

v*zero v*zero v*zero

-1

2.8k vcu1-23 vcv1-23 vcw1-23 vcu1-23

vcu1-23 vcv1-23 vcw1-23
voltage (V)

vcv1-23 vcw1-23
2.6k

2.4k

0 10m 20m 30m 40m 0 10m 20m 30m 40m 0 10m 20m 30m 40m
Time[sec] Time[sec] Time[sec]
Temperature limitation: 106 (125 ×0.85)
130 Diode: 121䉝 peak Diode: 121䉝 peak
Junction temperature [䉝]

120 Diode: 103䉝 peak Diode: 89䉝 peak Diode: 89䉝 peak Diode: 110䉝 peak Diode: 109䉝 peak
110
100 IGBT: 84䉝 IGBT:
84䉝 peak Diode: 66䉝 peak Diode: 73䉝 peak
peak
90 IGBT: 65䉝 IGBT: 112䉝 peak IGBT: 112䉝 peak IGBT: 71䉝
80 peak peak IGBT: 101䉝 peak IGBT: 101䉝 peak
IGBT: 96䉝 peak
70 u1 cell v1 cell w1 cell
u1 cell v1 cell w1 cell u1 cell v1 cell w1 cell
60
2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0 2.8 2.9 3.0
Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec] Time[sec]

(a) Single-phase fault (b) Phase-to-phase fault (c) Two-phase-to-ground fault

Fig. 6. Key waveforms of the MMCC-SDBC under ansynmetrical grid faults with the dip severity DB of 0.4pu.
1.0 130
[ ]
temperature [Υ]

0.9
[p.u]
command[p.u.]

120 Temtemperature limitation Tmax:

0.8 Diode 106Υ (=125Υ㽢0.85)
junction temperature

0.7 110
voltagecommand

0.6 100
0.5
90 IGBT
0.4
Peakvoltage

Peak junction

0.3 Single-phase fault 80

Phase-to-phase fault
0.2 Phase-to-phase fault Two-phase-to-ground fault
Peak

70
Peak

0.1 Two-phase-to-ground fault Single-phase fault

0.0 60
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Dip severity on PCC DB [p.u.] Dip severity on PCC DB [p.u.]
(a) Peak voltage command (b) Peak junction temperature
Fig. 7. Peak voltage command and junction temperature of the MMCC-SSBC under ansynmetrical grid faults regarding the dip severity DB.

Fig. 7 shows the maximum peak voltage command value

and peak junction temperature among clusters regarding dip C. Performance Comparison between the two types of MMCC
severity on Bus B DB. It can be noted that the peak voltage Fig. 8 shows the reactive power compensation capability
command does not saturate in the various grid fault scenarios. between the two MMCC solutions with SSBC and SDBC to
The peak junction temperatures increase quickly with phase-to- enable proper voltage-balancing under different dip severity at
phase fault and two-phase-to-ground fault conditions and reach Bus B with various grid faults. The compensation capability
upper limit temperature 106Υ when the voltage dip is 0.55 and limit of each MMCC with SSBC and SDBC is determined by
0.45 p.u., respectively. modulation saturation point and over the limit point of junction
temperature, respectively. The two types of MMCCs can

330
continue to supply rated reactive power when the dip severity V. CONCLUSION
of grid voltage higher than 0.5 p.u., but the reactive power This paper investigates the reactive power compensation
compensation capability shows limitation and different capability of MMCC for offshore wind farm STATCOM
characteristics under the dip severity lower than 0.5 p.u. as application with SSBC and SDBC circuit topologies. The study
below. focus on the operation conditions with various type of
1) The MMCC-SSBC: It reveals that the SSBC decreases asymmetrical grid faults in order to fulfill grid codes. The
the reactive current capacity steeply at voltage dip severity 0.4 sizing of the key components, number of cells, electro-thermal
p.u. under single-phase fault because of the saturation of peak analysis, and reactive power compensation of an 80 MVar / 33
kV MMCC based STATCOM are presented. The SSBC and
voltage command. However, it can supply rated reactive
SDBC have a limitation of reactive power compensation
current under phase-to-phase fault and two-phase-to-ground capability with different characteristics in each grid fault
fault condition regardless the dip severity. scenario when the dip severity of grid voltage is lower than 0.5
2) The MMCC-SDBC: The SDBC can supply the reactive p.u.. The SSBC could be more suitable due to the lower
current by a few percentage of reactive current derating under number of key components and comparable LVRT
single-phase fault. However, the SDBC decreases the reactive performance in this specific application.
current capability from the voltage dip severity 0.5 p.u. under
phase-to-phase fault and two-phase-to-ground fault, but can REFERENCES
implove the LVRT performance by reactive current derating. [1] K. Ma, M. Liserre, F. Blaabjerg, “Operating and Loading Conditions of
a Three-Level Neutral-Point-Clamped Wind Power Converter Under
Various Grid Faults,” IEEE Trans. Ind. Appl., vol. 50, pp. 520-530,
1.2 Jan./Feb. 2014.
SSBC Phase-to-phase fault
SSBC Two-phase-to-ground fault [2] M. Pereira, D. Retzmann, M. Wiesinger, G. Wong, ”SVC PLUS: An
1 MMC STATCOM for Network and Grid Access Applications,” in proc.
current [p.u.]

IEEE Trondheim PowerTech, 2011, pp. 1-5.

0.8
[3] H. Akagi, ”Classification, Terminology, and Application of the Modular
Reactive current

SDBC Single-phase fault

Multilevel Cascade Converter (MMCC), ” IEEE Trans. on Power
0.6
SDBC Two-phase-to-ground fault Electro., vol. 26, no. 11, pp. 3119-3130, Nov. 2011
0.4 SDBC Phase-to-phase fault [4] T. Kikuma, M. Takasaki, ”A Method Unbalance Compensation on Y-
connection Modular Multilevel Converter,” IEEJ Trans. on Industry
0.2 Applications, vol.132, no.12, pp.1159-1166, 2012.(Japanese)
SSBC Single-phase fault [5] M. Hagiwara, R. Maeda, [Link], “Negative-Sequence Reactive-Power
0 Control by a PWM STATCOM Based on a Modular Multilevel Cascade
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Converter (MMCC-SDBC),” IEEE Trans. on Ind. Applications, vol. 48,
The dip severity on Bus B: DB [p.u.] no. 2, pp. 720-729, MAR.-APR. 2012.
Fig. 8. Reactive power compensation capability of MMCC-SSBC and [6] E. Behrouzian, M. Bongiorno, “Investigation of Negative-Sequence
SDBC. Injection Capability of Cascaded H-Bridge Converters in Star and Delta
Configuration,” IEEE Trans. on Power Electro., vol. 32, pp. 1675-1683,
Feb. 2017
[7] Math H. Bollen, Understanding Power Quality Problems (Wiley, New
York, 2000).
[8] T. Wijnhoven; G. Deconinck; T. Neumann; I. Erlichm “Control aspects
of the dynamic negative sequence current injection of type 4 wind
turbines,” in proc. IEEE PES General Meeting , 2014, pp. 1 – 5.

331