MADANAPALLE INSTITUTE OF TECHNOLOGY & SCIENCE

(UGC-AUTONOMOUS)
Affiliated to JNTUA, Anantapuramu & Approved by AICTE, New Delhi

Course Code: 20EEE106 Course Title: Digital Electronics

Syllabus Regulation: R20 Type of Course: Professional Core
Program: B. Tech Branch: EEE
Year / Semester II / II Academic Year 2023-24
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Question Bank
UNIT I FUNDAMENTALS OF DIGITAL SYSTEMS AND LOGIC FAMILIES
Digital signals, Digital circuits, AND, OR, NOT, NAND, NOR and Exclusive-OR operations,
Boolean
algebra, examples of IC gates. Number systems-binary, signed binary, octal hexadecimal
number, binary arithmetic, one’s and two’s complements arithmetic.
[Link] Question CO BL
1 Simplify the following Boolean expression CO1 3
F=A+A’B+A’B’C+A’B’C’D
a) By using Boolean algebra
b) Implement the simplified function by using basic gates
c) Implement the simplified function by using NAND gates d)
Implement the simplified function by using NOR gates
2 Simplify the following Boolean expression CO1 3
F(A,B,C)=Ʃm (3,5,6,7)
a) By using Boolean algebra
b) Implement the simplified function by using basic gates
c) Implement the simplified function by using NAND gates d)
Implement the simplified function by using NOR gates
3 Convert the following CO1 3
a) (250.5)10= ( )8 = ( )16 = ( )2
b) (DADA.B)16 = ( )8 = ( )10 = ( )2
c) (735.125)8= ( )16 = ( )10 = ( )2
d) (10110110)2 = ( )16 = ( )10 = ( )8
e) (1100101)2 → Gray code
f) (7895)10 → BCD code
4 Convert the following CO1 3
a) (179.25)10= ( )8 = ( )16 = ( )2 b)
(ACDF.E)16 = ( )8 = ( )10 = ( )2 c)
(654.625)8= ( )16 = ( )10 = ( )2 d)
(1011011001.011)2 = ( )16 = ( )10 = ( )8
e) (1010100101)2→ Gray code
f) Gray code (111000101)→ binary
5 Subtract the following CO1 3
i. (76)10- (44)10 ii. (99)16-(AB)16
a) by using 1’s complement method
b) by using 2’s complement method
6 Subtract the following CO1 3
i. (64)10- (97)10 ii. (84)16-(46)16
a) by using 1’s complement method
a. by using 2’s complement method
7 Perform the following by using binary arithmetic CO1 3
a) 1011101101+1111011101
b) 11101011-10000110

d) 100011÷ 101
c) 11011×1011

e) Add 648 and 487 in BCD code.

8 Perform the following by using binary arithmetic a) CO1 3
100010010+110010010
b) 1110001-1001111 c)
10110×1010
d) 111101÷ 100
e) Add 598 and 624
9 ininin BCD
Implement codein gates by using NAND and NOR gates a) AND
the following CO1 3
gate
b) OR gate
c) NAND gate
d) NOR gate
e) EXOR gate
f) EXNOR gate
g) NOT gate
UNIT II COMBINATIONAL DIGITAL CIRCUITS
Standard representation for logic functions, K-map representation, simplification of logic functions
using K-map, minimization of logical functions. Don’t care conditions. Multiplexer, De-
Multiplexer/Decoders, Adders, Subtractors, BCD arithmetic, carry look ahead adder, serial adder,
Digital comparator, Parity checker/generator, Code converters, Priority encoders, Decoders.
1 Simplify the function using K-Map method CO1 3
F(A,B,CD)= Ʃm (0,4,5,11,13,14,15)+Ʃd (1,7,10)
a) Implement the simplified function with only AOI gates b)
Implement simplified function with only NAND gates c)
Implement simplified function with only NOR gates
d) Find Implicants, Prime Implicants, Essential Prime
Implicants and Redundant Prime Implicants
2 Simplify the function using K-Map method CO1 3
F(A,B,CD)= Ʃm (3,5,6,7,9,12,13)+Ʃd (2,8,15)
a) Implement it with only AOI gates
b) Implement it with only NAND gates
c) Implement it with only NOR gates
d) Find Implicants, Prime Implicants, Essential Prime
Implicants and Redundant Prime Implicants
3 Simplify the function using K-Map method CO1 3
F(A,B,CD)= Ʃm (1,3,4,5,6,7,9,12,13)
a) Implement it with only AOI gates
b) Implement it with only NAND gates
c) Implement it with only NOR gates
d) Find Implicants, Prime Implicants, Essential Prime
Implicants and Redundant Prime Implicants

4 Implement full subtractor by using CO2 3

a) 4×1 Multiplexer
b) 3 to 8 Decoder
c) NAND gates
5 Implement the following Boolean expression CO2 3
F(A, B, C, D) = ∑ m(0, 1, 5, 6, 8, 10, 12, 15)
a) By using 8×1 multiplexer with D as control input
b) By using 8×1 multiplexer with A as control input
c) By using 4×1 multiplexer with C and D as control inputs
6 Implement AB’+AC+C’D CO2 3
a) By using 8×1 multiplexer
b) By using 4×1 multiplexer
c) By using 2×1 multiplexer
7 Implement the following Boolean function with 8×1multiplexer, CO2 3
4×1 multiplexer and external gates
a) F1(A, B, C, D) = ∑ m(1,3,4,11,12,13,14,15)
b) F2(A, B, C, D) = ∑ m(1,2,5,7,8,10,11,13,15)
8 Implement 4- bit binary to Gray code converter by using 8×1 CO2 3
multiplexer.
9 Implement 4- bit Gray to binary code converter by using 8×1 multiplexer. CO2 3
10 Design and explain about the 2-bit digital comparator. CO2 3
11 Explain about the carry look ahead adder with necessary CO2 2
equations and neat diagram
12 Explain about the BCD adder with a necessary equations and neat CO2 2
diagram.
13 Design the 4-bit binary to Gray code converter. CO2 3
UNIT III SEQUENTIAL CIRCUITS AND SYSTEMS
A 1-bit memory, the circuit properties of bistable latch, the clocked SR flip flop, J- K-T And D-types
flip flops, applications of flipflops, shift registers, applications of shift registers, serial to parallel
converter, parallel to serial converter. State Machines- Moore and Mealy, State Diagram, State
Table, State Reduction and Assignment Design Procedure -Circuit implementation. Ring counter,
sequence generator, ripple(Asynchronous) counters, synchronous counters, counters design using flip
flops, special counter IC’s, asynchronous sequential counters, applications of counters.

[Link] Question CO BL
Explain about the operation of the following with the help of logic diagram, truth
table and also draw excitation table and characteristic table.
1 a. JK Flip flop
CO3 2
b. D Flip flop
Explain about the operation of the following with the help of logic diagram, truth CO3
table and also draw excitation table and characteristic table.
2 a. SR Flip flop
2
b. T flip flop
 Design the following flip-flops by using JK flip flop. CO3
3 (a) D Flip flop (b) T Flip flop (c) SR Flip flop
3

Design the following flip-flops by using T flip flop. CO3

4 (a) D Flip flop (b) JK Flip flop (c) SR Flip flop
3

Design the following flip-flops by using SR flip flop. CO3

5 (a) D Flip flop (b) T Flip flop (c) JK Flip flop
3

Design the following flip-flops by using D flip flop. CO3

6 (a) JK Flip flop (b) T Flip flop (c) SR Flip flop
3

CO3
7 Explain about the different types of shift registers with the help of diagrams 2
a) Write the differences between synchronous counter and asynchronous CO3
3
8 counters.
2
b) Explain about Mealy and Moore machines.?
9 Design the BCD ripple counter using JK flip – flops. CO3 3
CO3
10 Design the 4-bit ripple counter using JK flip – flops. 3

11 Design and implement a 4-bit synchronous up counter using T flip-flops. CO3 3

12 Design and implement a 3-bit synchronous up counter using JK flip-flops. CO3 3

13 Design and implement a 4-bit synchronous down counter using T flip-flops. CO3 3

14 Design and implement a 3-bit synchronous down counter using JK flip-flops. CO3 3
15 Design a sequential circuit to generate sequence of 10110 with necessary steps. CO3 3

UNIT IV DIGITAL LOGIC FAMILIES

Digital Logic Families – Introduction to RTL, DTL, TTL, ECL and MOSL families –operation,
characteristics of digital logic family – comparison of different logic families

1 Define all the characteristics of digital logic families. CO4 2

2 Discuss RTL logic family and explain the working of a two-input RTL NOR CO4 2
and
NAND gate.
3 Explain about DTL NAND gate with a suitable diagram. CO4 2

4 a) With the help of a neat diagram, explain the working of a Totem – pole TTL CO4 2
logic circuit.
b) Compare the major characteristics of RTL, DTL and TTL logic families. 3

5 Discuss ECL OR/NOR gate with neat circuit schematic. CO4 2

6 Explain about the operation of two input CMOS NAND and NOR gates with CO4 2
the help of relevant diagrams

UNIT V SEMICONDUCTOR MEMORIES AND PROGRAMMABLE LOGIC DEVICES

Memory organization and operation, expanding memory size, classification and characteristics of memories,
sequential memory, read only memory (ROM), read and write memory (RAM), content addressable memory
(CAM), charge de coupled device memory (CCD), commonly used memory chips, ROM as a PLD,
Programmable logic array, Programmable array logic, complex Programmable logic devices (CPLDS), Field
Programmable Gate Array (FPGA), HDL description.
1 What is Programmable Logic Array (PLA) and Programmable Array Logic CO5 3
(PAL)? Discuss the logic designs with suitable examples.
2 Classify PLDs with respect to their CO5 3
programmability. Briefly discuss about the CPLD
and FPGA.
3 What is meant by memory expansion? How is memory expansion attained? CO5 2
4 Design the full adder and half adder by using PROM CO5 2

5 Design the full subtractor and half subtractor by using PROM CO5 2

𝐹1 (�, �, � ) = Σ(0,1,2,4), 𝐹2 (�, �, �) =

6 Implement the following two Boolean functions with a PLA CO5 2

Σ(0,5,6,7)
7 Implement the following Boolean function with a PLA CO5 3
f1 (a,b,c) = ∑m (2,3,4,6)
f2 (a,b,c) = ∑m (0,3,5,7)
f3 (a,b,c) = ∑m (0,1,3,7)
f4 (a,b,c) = ∑m (0,1,2,4)
8 Implement the following two Boolean functions with a PAL CO5 3
w(A, B, C, D) = ∑(2, 12, 13)
x(A, B, C, D) = ∑(7, 8, 9, 10, 11, 12, 13, 14, 15)
y(A, B, C, D) = ∑(0, 2, 3, 4, 5, 6, 7, 8, 10, 11, 15)
z(A, B, C, D) = ∑(1, 2, 8, 12, 13)
9 Design a BCD to grey code converter using PAL. CO5 3
10 Design a BCD to Excess-3 code converter using PAL. CO5 3

11 Implement the following Boolean function with a PLA CO5 3

f1 (a,b,c) = ∑m (1,3,5,6)
f2 (a,b,c) = ∑m (0,1,6,7)
f3 (a,b,c) = ∑m (3,5)
f4 (a,b,c) = ∑m (1,2,4,5,7)
12 Implement the combinational circuit that squares a three bit number using the CO5 3
PROM.

13 Implement the combinational circuit that squares a three bit number using the PLA CO5 3
23 Design and explain about the 3-bit parity generator and 4- bit CO2 3
parity checker.
24 Explain about the 8 to 1 multiplexer with block diagram, truth CO2 2
table, output expression and logic diagram
25 Explain about the 1 to 8 demultiplexer with block diagram, CO2 2
truth table, output expression and logic diagram
26 Explain about the octal to binary encoder with block diagram, CO2 2
truth table, output expression and logic diagram.
27 Explain about the BCD to decimal Decoder with block diagram, CO2 2
truth table, output expression and logic diagram.