MODULE 2
EXAMPLE 4.3: Given the load line of Fig. 4.16 and the defined Q -point, determine the
required values of VCC , RC , and RB for a fixed-bias configuration.
Module 2: Biasing of BJT and FET.
1. Design a CB amplifier Rs =1200Ω and the load impedance is =1000Ω, use suitable
h-parameters. (Create) -10 Marks
2. Calculate the current gain, voltage gain and power gain of CE and CB amplifier with load of 3KΩ
and justify which amplifier gain is more than the other. (Analyse) -10 Marks
3. Design a low-frequency amplifier circuit to drive a load resistor RL with an improved efficiency
and minimized distortion. The circuit uses two identical amplifiers A1 and A2, each with a gain
of A. The input signal Vin is applied to A1 directly and to A2 after being inverted. The
amplifiers are ideal with no internal losses. (Create) -10 Marks
4. Design the cascade circuit shown below to meet the following specifications VCE1 = VCE2 =
2.5V , VBE = 0.7 V , IC1 =IC2 = 1mA , and IR1 = IR2 = IR3 = 0.10 mA. (Create) -10 Marks
5. Derive expression for the short circuit current gain of common emitter amplifier at High
Frequency. Define alpha cutoff frequency, beta cutoff frequency transition frequency and
derive their values in terms of the circuit parameters. (Evaluate) -10 Marks
6. Determine the bandwidth of CE amplifier with the following specifications. R1=100kΩ,
R2=10kΩ, RC=9kΩ, RE=2kΩ, C1= C2=25μF, CE=50μF, rbb’=100Ω, rb’e=1.1KΩ, hfe=225,
Cb’e=3pF and Cb’c=100pF. (Evaluate) 10 Marks
7. Design a Zener voltage regulator to meet output voltage =5V, load current =10mA, Zener
wattage=400mW and input voltage=10±2V. (Create) -5 Mark
8. In a Zener regulator dc input is 10V±20%. The output requirements are 5V, 20 mA. Assume
Iz(min) and Iz(max) as 5mA and 80mA respectively. Design zener regulator. (Create) -5 Marks
9. A system needs to be powered with 9V dc source of max current 100mA. Design a circuit to
supply power with the available domestic ac line. Assume any data required but reasonable.
Provide short circuit protection. (Create) -10 Marks
10. Given that ICQ = 2 mA and VCEQ = 10 V, determine R1 and RC for the network of following
figure to provide proper biasing. (Create) -10 Marks
11. Determine the resistor values for the network of following figure for the indicated operating
point and supply voltage. (Create) -5 Marks
12. For the circuit shown in following figure, find (i) the dc bias levels (ii) dc voltages across the
capacitors (iii) ac emitter resistance (iv) voltage gain and (v) state of the transistor. (Evaluate)
-10 Marks
13. An amplifier has an open circuit voltage gain of 1000, an output resistance of 15Ω and an input
resistance of 7kΩ. It is supplied from a signal source of emf. 10mV and internal resistance 3kΩ.
The amplifier feeds a load of 35 Ω. Find out: (i) the magnitude of output voltage and (ii) power
gain. (Evaluate) -10 Marks
14. In the voltage regulator shown in the figure, the load current can vary from 100 mA to 500 mA.
Assuming that the Zener diode is ideal (i.e., the Zener knee current is negligibly small and Zener
resistance is zero in the breakdown region), find the value of R. (Evaluate) -10 Marks
Module 4: Feedback and Oscillators
Sl. No. Questions with Solutions Blooms Level
1 How does the choice of (Evaluate)
inductance and capacitance
values affect the frequency -5 Marks
stability and output
amplitude of a Hartley
oscillator?
2 How does the choice of (Evaluate)
tapping point in the inductor
coil affect the performance of -5 Marks
a Hartley oscillator?