HDL analysis (HAL) Adoption Guide
Product Version 5.81
June 2006
2004-2006 Cadence Design Systems, Inc. All rights reserved.
Printed in the United States of America.
Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USA
Trademarks: Trademarks and service marks of Cadence Design Systems, Inc. (Cadence) contained in
this document are attributed to Cadence with the appropriate symbol. For queries regarding Cadence’s
trademarks, contact the corporate legal department at the address shown above or call 800.862.4522.
Open SystemC, Open SystemC Initiative, OSCI, SystemC, and SystemC Initiative are trademarks or
registered trademarks of Open SystemC Initiative, Inc. in the United States and other countries and are
used with permission.
All other trademarks are the property of their respective holders.
Restricted Print Permission: This publication is protected by copyright and any unauthorized use of this
publication may violate copyright, trademark, and other laws. Except as specified in this permission
statement, this publication may not be copied, reproduced, modified, published, uploaded, posted,
transmitted, or distributed in any way, without prior written permission from Cadence. This statement grants
you permission to print one (1) hard copy of this publication subject to the following conditions:
1. The publication may be used solely for personal, informational, and noncommercial purposes;
2. The publication may not be modified in any way;
3. Any copy of the publication or portion thereof must include all original copyright, trademark, and other
proprietary notices and this permission statement; and
4. Cadence reserves the right to revoke this authorization at any time, and any such use shall be
discontinued immediately upon written notice from Cadence.
Disclaimer: Information in this publication is subject to change without notice and does not represent a
commitment on the part of Cadence. The information contained herein is the proprietary and confidential
information of Cadence or its licensors, and is supplied subject to, and may be used only by Cadence’s
customer in accordance with, a written agreement between Cadence and its customer. Except as may be
explicitly set forth in such agreement, Cadence does not make, and expressly disclaims, any
representations or warranties as to the completeness, accuracy or usefulness of the information contained
in this document. Cadence does not warrant that use of such information will not infringe any third party
rights, nor does Cadence assume any liability for damages or costs of any kind that may result from use of
such information.
Restricted Rights: Use, duplication, or disclosure by the Government is subject to restrictions as set forth
in FAR52.227-14 and DFAR252.227-7013 et seq. or its successor.
HDL analysis (HAL) Adoption Guide
Contents
1
HAL Adoption Guide .............................................. 5
Features of HAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Extensive and wide range of built-in checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Intuitive GUIs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Powerful customization capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
HAL in the Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
How to run HAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
How to quickly become productive using HAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Lint_example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Synth_FSM_example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Race_example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Struct_CDC_example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DFT_example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Netlist_example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Useful Tips to Effectively use HAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
June 2006 3 Product Version 5.81
HDL analysis (HAL) Adoption Guide
June 2006 4 Product Version 5.81
HDL analysis (HAL) Adoption Guide
1
HAL Adoption Guide
Incisive HDL analysis (HAL) catches design errors before you simulate and synthesize your
design. HAL is an extremely powerful design checking tool with hundreds of built-in checks.
HAL helps design teams write code that will work smoothly throughout the entire flow and be
reusable in other designs.
This guide describes how to successfully start working with HAL by focusing on a subset of
rules that catch the most common errors. All of the built-in checks in HAL are grouped in
different categories in the HAL definitions file at <install_dir>/tools/hal/files/[Link].
Successful manipulation of the definitions file to create a subset of checks is the key to
success with HAL.
After learning the basics, you can use the methodology examples provided in the HAL
installation tree and the HAL definition files in these examples to create your own rule sets for
your project’s needs. This document provides information on:
■ Features of HAL
■ HAL in the Design Flow
■ How to run HAL
■ How to quickly become productive using HAL
■ Useful Tips to Effectively use HAL
Features of HAL
Following are the key features of HAL:
■ Extensive and wide range of built-in checks
■ Intuitive GUIs
■ Powerful customization capability
June 2006 5 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Extensive and wide range of built-in checks
HAL includes more than 500 unique built-in checks. These checks are grouped under various
categories in the HAL definitions file. Some of the key categories are:
■ RTL_CODINGSTYLE and RTL_NAMING: Rules in these categories help you check the
design for good coding styles, naming convention, portability, and reusability.
■ RMM: This category has rules that check the design for language and coding
consistency and synthesis compatibility as per the Reuse Methodology Manual.
■ RTL_SYNTH and RTL_SIMSYNTH: These categories have rules that identify
unsynthesizable constructs in the design and the constructs that can lead to a pre-
synthesis and post-synthesis simulation mismatch.
■ STRUCTURAL: This category has rules that check the design for structural issues, such
as feedthroughs, combinatorial paths, and shoot-throughs.
■ FSM: This category has rules that check the design for compliance to FSM modeling
styles, unreachable and terminal states.
■ DFT: This category has rules that check for ad hoc DFT issues. These DFT issues make
design nodes uncontrollable and unobservable.
■ CLOCKDOMAIN: This category has rules that help you check for signals crossing clock-
domains, without proper synchronization.
■ SCANCHAIN: This category has rules that check for correct length, single scan enable,
and single clock in the scan chains inserted in the design.
■ ALL_SYSTEMC: This category has rules that check for design consistency and
conformance to the SystemC modeling styles.
■ PALLADIUM: This category has rules that help you make the design compatible for
compilation and execution on the Palladium emulator box.
Intuitive GUIs
HAL provides intuitive GUIs for:
■ Configuring definition file through HAL Definition file editor
■ Browsing log files through NCBrowse
■ Debugging Violations through Schematic Tracer
June 2006 6 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Configuring definition file through HAL Definition file editor
You use the HAL Definition File Editor to configure the categories and produce company-
specific definition file. HAL Definition File Editor provides a list of category and rules as
defined in the .def file. It also allows you to edit all parameters for each check. To launch the
HAL Definition File Editor, use the haldefedit command given below.
% haldefedit -defines [Link]
Note: Alternatively, you can launch the HAL Definition File Editor by choosing the Utilities
menu in NCLaunch. The following figure displays the HAL Definition File Editor.
June 2006 7 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Browsing log files through NCBrowse
The NCBrowse interface allows you to browse the violations reported by HAL and custom
rules from shared libraries. You can also filter, sort, and analyze messages using the
NCBrowse interface. You launch NCBrowse using the ncbrowse command or by issuing
-gui option to the hal executable, as shown below.
% hal <options> -gui
or
% ncbrowse [Link]
The following figure displays the NCBrowse interface.
In the NCBrowse interface, the left pane displays the error, the right pane displays the part of
HDL code causing that error and the lower pane displays the detailed error message.
June 2006 8 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Debugging Violations through Schematic Tracer
The Schematic Tracer interface allows you to debug the violations and visually observe faults.
This interface is available in the SimVision tool. Schematic Tracer highlights the error part in
the RTL abstracted view. This helps you debug and analyze error messages. Once you enter
SimVision through the Schematic Tracer, you can use other features, such as explore
connectivity and navigate design hierarchy. These features help you effectively debug the
violation in the complete design context.
The following figure displays the Schematic Tracer.
In the figure, the signals corresponding to the error are highlighted in red.
June 2006 9 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Powerful customization capability
HAL users can customize built-in checks and also write their own rules. HAL provides a
standard API that helps users code user-defined checks. Using these customization
capabilities, users can create a customized environment as per their needs.
■ For pre-defined checks, the users can:
❑ Change the severity of a check. The severity includes WARNING, ERROR, or
NOTE. You can change the severity by textually editing the definition file or by using
the GUI, HAL Definition File Editor.
❑ Add a check to an existing category or add a new category. You can add a check by
textually editing the definition file or by using the GUI, HAL Definition File Editor.
❑ Rename checks and categories. This can be done by textually editing the definition
file or by using the GUI, HAL Definition File Editor.
❑ Change short messages of a check. You can change short messages by textually
editing the definition file or by using the GUI, HAL Definition File Editor.
❑ Change the extended description of a check.
■ To code user-defined checks, users can use:
❑ Standard IEEE interfaces such as VPI/VHPI
❑ CPI (Cadence internal API for coding structural checks)
For help on writing custom rules, refer to the examples at: <install_dir>/tools/hal/
examples.
June 2006 10 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
HAL in the Design Flow
In the design flow, HAL runs at two stages. These are:
■ On the RTL design: At this stage, HAL identifies violations related to RMM guidelines,
non-synthesizable constructs, simulation race conditions, FSM checks, and DFT checks.
In addition, HAL performs Acceleration policy checks on elaborated designs before
taking the design for simulation acceleration using Palladium.
■ On the design Netlist: At this stage, HAL checks for errors introduced during test
synthesis, especially related to scan chains.
The following shows where HAL fits in a typical design flow.
June 2006 11 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
How to run HAL
HAL supports Verilog, VHDL, Mixed HDL, and SystemC designs. For Verilog designs, HAL
supports both file-based analysis as well as the snapshot-based analysis. For VHDL and
mixed-language designs, HAL supports snapshot-based analysis. For SystemC designs,
only file-based analysis is supported. In the snapshot-based mode, HAL performs the
complete set of checks including checks, which span across multiple modules. In the file-
based mode (for Verilog and SystemC), HAL performs only lint checks.
To run HAL, you issue the following commands.
■ For Verilog designs, HAL is run in following modes:
❑ File-based mode
hal [-options] srcfile_1 [srcfile_2...srcfile_n]
❑ Snapshot-based mode
ncvlog [-options] srcfile_1 [srcfile_2...srcfile_n]
ncelab -access +c [-options] [lib]:cell:[view]
hal [-options] [lib]:cell:[view] -gui
OR
ncverilog +elaborate +ncaccess+c [-options] srcfile_1[srcfile_2 ...
srcfile_n]
hal [-options] -gui
■ For VHDL designs, HAL is run only in the snapshot mode.
ncvhdl [-options] srcfile [srcfile_2...srcfile_n]
ncelab -access +c [-options] [lib]:cell:[view]
hal [-options] [lib]:cell:[view] -gui
■ For Mixed language designs, HAL is run only in the snapshot mode.
ncvhdl [-options] srcfile [srcfile_2...srcfile_n]
ncvlog [-options] srcfile_1 [srcfile_2...srcfile_n]
ncelab -access +c [-options] [lib]:cell:[view]
hal [-options] [lib]:cell:[view] -gui
■ For SystemC designs, HAL is run only in the file-based mode.
hal [-options] systemc_srcfile [systemc_srcfile_2........ systemc_srcfile_n]
June 2006 12 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
How to quickly become productive using HAL
The key to quickly becoming productive with HAL is to limit the number of checks that you do
at the beginning. HAL has hundreds of checks and if you run them all at once you can quickly
become overwhelmed.
HAL allows you to create subsets of checks that focus on certain areas of your design. These
subsets are stored in HAL definition files. HAL comes with a wide variety of example definition
files in the release tree. Use these examples to learn how to use HAL. Once you become
proficient, you can create your own definition files.
Try the following examples and definition files to learn how to use HAL.
Lint_example
This example shows the various built-in lint checks in HAL. This example contains a
customized definition file ([Link]) for basic lint and coding style checks for your RTL design.
For details, refer to the example at: <install_dir>/tools/hal/methodology/Lint_example.
Copy the example file [Link], to your working directory to begin using it. Use the
-defines command-line option with HAL to specify the definitions file.
% hal -defines [Link] [-options] [lib]:cell:[view] -gui
Using the HAL Definition File Editor GUI, you can add or delete checks and categories in the
[Link] definitions file. Please note that each check should be added in a category, or else
it will not be reported.
Synth_FSM_example
This example shows the various built-in synthesizability, simulation synthesis mismatch, and
FSM coding style checks in HAL. This example contains a customized definition file
(Synth_FSM.def) that helps you perform synthesizability and FSM modeling checks on your
RTL design.
For details, refer to the example at: <install_dir>/tools/hal/methodology/
Synth_FSM_example.
June 2006 13 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Race_example
This example shows the various built-in simulation race condition checks in HAL. This
example directory contains the customized definition file (Sim_Race.def) for checking race
condition checks on your RTL design.
For details, refer to the example at: <install_dir>/tools/hal/methodology/Race_example.
Struct_CDC_example
This example shows how to perform the important built-in structural and clock domain checks
in HAL. This example directory contains the customized definition file (Struct_CDC.def) for
checking the RTL design for structural issues and clock domain synchronization issues.
For details, refer to the example at: <install_dir>/tools/hal/methodology/
Struct_CDC_example.
DFT_example
This example shows how to perform the important built-in DFT checks in HAL. This example
directory contains the customized definition file ([Link]) for checking the RTL design for
DFT issues.
For details, refer to the example at: <install_dir>/tools/hal/methodology/DFT_example.
Netlist_example
This example shows various checks to verify the gate level netlist of a design for structural
issues and issues related to the scan chains. This example contains the customized definition
file ([Link]) for checking the Netlist design for structural, DFT, and scan chain issues.
For details, refer to the example at: <install_dir>/tools/hal/methodology/
Netlist_example.
June 2006 14 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
Useful Tips to Effectively use HAL
Following are a few useful tips that will help you effectively use HAL:
■ To run HAL only on a part of the design, use the -top option.
% hal -top <relative_design_top> [Options] [lib].cell:[view]
where <relative_design_top> for verilog deigns is the complete hierarchical name
of the instance separated by ".". In VHDL designs, it is :<complete_path> where ":"
is the current scope.
■ To switch OFF/ON a particular check/category, use the -check/-nocheck option(s).
% hal -check <category/check> [Options] [lib].cell:[view]
% hal -nocheck <category/check> [Options] [lib].cell:[view]
For the non-exclusive categories, both the -check and -nocheck options are used in
the same command line, then the -check option takes precedence.
■ To switch OFF/ON a check/category on only a part of the design, use lintpragmas in the
design or in the external file (design_info file).
❑ Inside the RTL code, lintpragmas are specified as:
module (.....)
.....HDL code....
// lint_checking <category> OFF
........HDL code....
........HDL code....
// lint_checking <category> ON
.......HDL code....
endmodule
To run HAL on the design using lintpragmas, use the following command:
% ncvlog/ncvhdl -pragma options] srcfile_1 [srcfile_2...srcfile_n]
% hal -lintpragma [Options] [lib].cell:[view]
❑ Inside the design_info file, lintpragmas are specified as:
lint_checking file = <filename_or_path>
{
<CHECK/SEVERITY/CATEGORY>... <off/on> [<from_line_number> -
<to_line_number>]
}
To run HAL by specifying design_info file as an input:
% hal -design_info <file> [Options] [lib].cell:[view]
June 2006 15 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
where <file> is the name of the design_info file that includes the information
about the lintpragmas.
■ To exclude a particular module/DU/library from HAL’s analysis, you can blackbox them.
You can specify the information about design units and files to be blackboxed in the
design_info file as:
bb_list
{
designunit = <blackbox_elm>;
file = <filename_or_path>;
}
To run HAL by specifying design_info file as an input:
% hal -design_info <file> [Options] [lib].cell:[view]
where <file> is the name of the design_info file that includes the information about
the modules/DUs/libraries to be blackboxed.
■ To run HAL on the gate-level netlist of the design, use the -read_tlf/read_lib
option.
% hal -read_tlf <tlf_library> [Options] [lib].cell:[view]
% hal -read_lib <lib_library> [Options] [lib].cell:[view]
where <tlf_library> is the synthesis library in the Timing library format (*.tlf) and
<lib_library> is the synthesis library in the Synopsys library format (*.lib).
■ To open the HAL browser (Ncbrowse) with checks sorted, use, -ncb_<sortby> option.
This option helps in easy browsing.
% hal [Options] [lib].cell:[view] -ncb_sortby <keyval> -gui
where <keyval> is the sorting criteria. For example, to sort checks based on category,
<keyval> should be CATEGORY.
■ To do the complete clock-domain and DFT analysis, details of the design clocks need to
be specified. You can specify the clock details in the design_info file as:
pin_desc [scope=<hierarchical-scope-name>]
{
<pin1> <clock [test_clock] [domain=<domain-name>]>;
....
}
To run HAL by specifying design_info file as an input:
% hal -design_info <file> [Options] [lib].cell:[view]
where <file> is the name of the file containing information about clocks details.
June 2006 16 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
■ To run HAL in the simulation acceleration flow (NC + Palladium), use the -check
palladium option. In addition to performing the acceleration policy checks, HAL
generates the module partition list and the directives list for the simulation acceleration
flow. The module list is stored in the file named simaccel_modules.lst and the
directives list is stored in the file named [Link].
% hal -check palladium [Options] [lib].cell:[view]
Note: For more details, refer to the Incisive HDL analysis documentation at:
❍ HAL User Guide - <install_dir>/tools/doc/hal/[Link]
❍ HAL Reference Manual - <install_dir>/tools/doc/hal/[Link]
You can also access the HAL documentation from the standard Cadence
documentation: % cdsdoc
June 2006 17 Product Version 5.81
HDL analysis (HAL) Adoption Guide
HAL Adoption Guide
June 2006 18 Product Version 5.81