Compact Models in Semiconductor Devices: Python Implementation

Guide
1. Introduction
Compact models are simplified mathematical representations of semiconductor device
behavior used in circuit simulation and design. Rather than solving the complex underlying
physics equations, compact models employ analytical or empirical formulas to predict
device I-V characteristics with reduced computational cost[1]. This document provides
comprehensive Python implementations of three fundamental compact models: diodes,
MOSFETs, and BJTs.

1.1 Purpose of Compact Models

Compact models balance three critical requirements: - Accuracy: Sufficient fidelity to
predict circuit behavior - Computational Speed: Fast evaluation for transient circuit
simulation - Simplicity: Interpretable equations for parameter extraction
Standard models are defined in SPICE levels (Level 1 for simplest) and industry standards
(BSIM, mextram, etc.)[1][2].

2. Diode Compact Model

2.1 Shockley Diode Equation
The fundamental analytical model for semiconductor diodes is the Shockley equation:
𝑉𝐷
𝐼𝐷 = 𝐼𝑆 (𝑒 𝑛𝑉𝑇 − 1)

Parameter Definitions:

Parameter Symbol Typical Value Unit Physical Meaning

Diode Current 𝐼𝐷 Variable A Output current
Saturation 𝐼𝑆 10−12 to 10−14 A Reverse bias leakage
Current
Applied 𝑉𝐷 Variable V Applied bias voltage
Voltage
Ideality Factor 𝑛 1-2 Dimen Junction quality (1 =
sionles ideal)
s
Thermal 𝑉𝑇 0.0259 V 𝑘𝑇
at 300K
𝑞
Voltage
2.2 Python Implementation
import numpy as np
import [Link] as plt

def shockley_diode(Vd, Is=1e-12, n=1, Vt=0.0259):

"""
Implements Shockley diode equation for I-V characteristic

Parameters:
-----------
Vd : float or array_like
Diode voltage (V). Positive = forward bias, negative = reverse bias
Is : float
Saturation current (A) - default 1 pA typical silicon diode
n : float
Ideality factor - default 1 (ideal junction)
n=1: drift-diffusion transport
n=2: space-charge-limited recombination
Vt : float
Thermal voltage (V) - default 25.9 mV at room temperature (300K)
Vt = k*T/q where k=1.38e-23 J/K, T=300K, q=1.602e-19 C

Returns:
--------
Id : float or array_like
Diode current (A)
Positive: forward bias current (exponential growth)
Negative: reverse bias current ≈ -Is (saturation)

Notes:
------
- Forward bias (V_D > 0): exponential I-V relationship
- Reverse bias (V_D < 0): current saturates at -I_S
- Forward voltage ≈ 0.7 V for silicon at 1 mA
- Characteristic equation: I_D ∝ exp(V_D / V_T)
"""
return Is * ([Link](Vd / (n * Vt)) - 1)

2.3 Diode Characteristics and Verification

Forward Bias Analysis:
At room temperature with 𝐼𝑆 = 1 pA and 𝑛 = 1:

𝑉𝐷 (V) 𝐼𝐷 (A) Physical Regime

-0.5 −1.0 × 10 −12
Reverse saturation
0.3 1.6 × 10−9 Weak forward bias
0.5 8.5 × 10−6 Moderate forward
 𝑉𝐷 (V) 𝐼𝐷 (A) Physical Regime
0.7 1.1 × 10−3 Standard operating point
0.8 26 × 10−3 Strong forward bias

Key Physical Insights:

1. Exponential dependence: Current increases exponentially with voltage according
to 𝐼𝐷 ∝ exp(𝑉𝐷 /𝑉𝑇 )
2. Reverse saturation: 𝐼𝐷 ≈ −𝐼𝑆 for large negative bias (constant saturation current)
𝑘𝑇
3. Temperature dependence: 𝑉𝑇 = increases with temperature
𝑞
4. Thermal voltage: At 300K, 𝑉𝑇 ≈ 26 mV; every 60 mV increase multiplies reverse
current by factor of 2.7
5. Practical forward voltage: Approximately 0.6-0.7 V for silicon at moderate
forward currents

3. MOSFET Level 1 Compact Model

3.1 Long-Channel MOSFET Equations
MOSFET Level 1 (simplest SPICE model) uses long-channel approximation to derive drain
current in two operating regions:
Linear Region (𝑉𝐷𝑆 < 𝑉𝑂𝑉 ):
2
𝑊 𝑉𝐷𝑆
𝐼𝐷 = 𝐾𝑝 [𝑉𝑂𝑉 𝑉𝐷𝑆 − ]
𝐿 2

Saturation Region (𝑉𝐷𝑆 ≥ 𝑉𝑂𝑉 ):

1 𝑊 2
𝐼𝐷 = 𝐾 𝑉
2 𝑝 𝐿 𝑂𝑉
Where Overdrive Voltage:
𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑇𝐻

3.2 MOSFET Parameter Definitions

Parameter Symbol Typical Value Meaning
Drain Current 𝐼𝐷 Variable Output current
Gate-Source Voltage 𝑉𝐺𝑆 Variable Gate bias
Drain-Source 𝑉𝐷𝑆 Variable Applied drain
Voltage voltage
Threshold Voltage 𝑉𝑇𝐻 0.4-0.9 V Minimum 𝑉𝐺𝑆 for
conduction
Parameter Symbol Typical Value Meaning
Overdrive Voltage 𝑉𝑂𝑉 𝑉𝐺𝑆 − 𝑉𝑇𝐻 Effective bias
above threshold
Transconductance 𝐾𝑝 100 − 500 𝜇A/V² 𝜇𝑝 𝐶𝑜𝑥 process
Param parameter
Gate Width 𝑊 1 − 100 𝜇m Physical gate
width
Gate Length 𝐿 0.1 − 10 𝜇m Physical gate
length
(technology
dependent)

3.3 MOSFET Python Implementation

def mosfet_level1_id(Vgs, Vds, Vth=0.7, Kp=100e-6, W=10e-4, L=1e-6):
"""
MOSFET Level 1 compact model for drain current

Parameters:
-----------
Vgs : float
Gate-source voltage (V)
Vds : float or array_like
Drain-source voltage (V)
Vth : float
Threshold voltage (V) - default 0.7 V (NMOS)
Kp : float
Process transconductance parameter (A/V²)
Kp = μ_n * C_ox where:
μ_n: carrier mobility (typically 400-600 cm²/V-s for electrons)
C_ox: gate oxide capacitance per unit area
W : float
Gate width (m) - default 10 μm
L : float
Gate length (m) - default 1 μm

Returns:
--------
Id : float or array_like
Drain current (A)

Operating Regions:
-------------------
1. Cutoff: V_GS < V_TH → I_D = 0 (OFF state)
2. Linear (Triode): V_DS < V_OV → Resistive behavior
3. Saturation: V_DS ≥ V_OV → Current-source behavior
4. Early Effect (not in Level 1): V_DS > V_OV causes slight I_D increase
 Assumptions:
- Long-channel device (W/L >> 1)
- No parasitic resistances
- No substrate effects
- Ideal capacitive coupling
"""
Vov = Vgs - Vth
K = Kp * (W / L)

if [Link](Vds):
# Single value calculation
if Vov <= 0:
return 0 # Cutoff region
if Vds < Vov:
# Linear region
return K * (Vov * Vds - 0.5 * Vds**2)
else:
# Saturation region
return K * 0.5 * Vov**2
else:
# Array calculation for multiple V_DS values
Id = np.zeros_like(Vds, dtype=float)
if Vov > 0:
linear_mask = Vds < Vov
sat_mask = Vds >= Vov
Id[linear_mask] = K * (Vov * Vds[linear_mask] - 0.5 * Vds[linear_
mask]**2)
Id[sat_mask] = K * 0.5 * Vov**2
return Id

3.4 MOSFET Output Characteristics

Output characteristics display 𝐼𝐷 vs 𝑉𝐷𝑆 for different 𝑉𝐺𝑆 values:

𝑉𝐺𝑆 (V) 𝑉𝐷𝑆 (V) Region 𝐼𝐷 (mA)

0.8 0.1 Linear 0.0050
0.8 0.5 Linear 0.0425
0.8 2.0 Saturation 0.0045
1.0 0.1 Linear 0.0150
1.0 0.5 Linear 0.1375
1.0 2.0 Saturation 0.0150
1.5 0.1 Linear 0.0400
1.5 0.5 Linear 0.3375
1.5 2.0 Saturation 0.0400

Key Operating Observations:

 1. Subthreshold: Below threshold voltage (𝑉𝐺𝑆 < 𝑉𝑇𝐻 ), 𝐼𝐷 ≈ 0 (OFF state)
2. Linear region: Current increases nearly linearly with 𝑉𝐷𝑆 ; acts as voltage-controlled
resistor
3. Saturation region: Current becomes nearly independent of 𝑉𝐷𝑆 ; acts as voltage-
controlled current source
4. W/L ratio: Current scales linearly with aspect ratio (doubling W/L doubles 𝐼𝐷 at
same bias)
∂𝐼𝐷 𝑊
5. Transconductance: 𝑔𝑚 = = 𝐾𝑝 𝑉𝑂𝑉
∂𝑉𝐺𝑆 𝐿

4. BJT Ebers-Moll Compact Model

4.1 Simplified Forward Active Region
For BJT operating in forward active region (normal amplification):
𝑉𝐵𝐸
𝐼𝐶 = 𝛽 ⋅ 𝐼𝑆 (𝑒 𝑉𝑇 − 1)

𝑉𝐵𝐸
𝐼𝐵 = 𝐼𝑆 (𝑒 𝑉𝑇 − 1)

Where: - 𝐼𝐶 : Collector current (primary output current) - 𝐼𝐵 : Base current (input control
current) - 𝛽 (or ℎ𝐹𝐸 ): Forward current gain (typically 50-300) - 𝐼𝑆 : Saturation current - 𝑉𝐵𝐸 :
Base-emitter voltage (≈ 0.7 V at normal operation) - 𝑉𝑇 : Thermal voltage (0.0259 V at
300K)

4.2 Complete Ebers-Moll Three-Current Formulation

For accurate large-signal modeling across all operating regions, the complete Ebers-Moll
model uses three coupled exponential equations:
𝐼𝐶 = 𝛽𝐹 𝐼𝐵𝐸 − 𝐼𝐵𝐶
𝐼𝐸 = −𝐼𝐵𝐸 − 𝛽𝑅 𝐼𝐵𝐶
𝐼𝐵 = −(𝐼𝐶 + 𝐼𝐸 )
Where the junction currents are:
𝑉𝐵𝐸
𝐼𝐵𝐸 = 𝐼𝑆 (𝑒 𝑉𝑇 − 1)

𝑉𝐵𝐶
𝐼𝐵𝐶 = 𝐼𝑆 (𝑒 𝑉𝑇 − 1)

Parameters: - 𝛽𝐹 : Forward current gain (forward active region, typically 50-300) - 𝛽𝑅 :

Reverse current gain (reverse saturation region, typically 0.1-5) - 𝑉𝐵𝐶 : Base-collector
voltage
4.3 BJT Python Implementation
def bjt_ic_forward_active(Vbe, Is=1e-15, beta=100, Vt=0.0259):
"""
Simplified BJT collector current (forward active region only)

Parameters:
-----------
Vbe : float or array_like
Base-emitter voltage (V) - typically 0.6-0.7 V
Is : float
Saturation current (A) - typically 1e-14 to 1e-16 A
beta : float
Forward current gain (β or h_FE)
Common range: 50-300 depending on device and geometry
β = I_C / I_B in active region
Vt : float
Thermal voltage (V) - 0.0259 V at 300K

Returns:
--------
Ic : float or array_like
Collector current (A)

Validity:
--------
Valid for forward active region only:
- V_BE: 0.5-0.8 V (typically 0.7 V for silicon)
- V_BC: Negative (reverse biased base-collector junction)
- Device not saturated
"""
return beta * Is * ([Link](Vbe / Vt) - 1)

def bjt_ib_forward_active(Vbe, Is=1e-15, Vt=0.0259):

"""
Simplified BJT base current (forward active region)

Parameters:
-----------
Vbe : float or array_like
Base-emitter voltage (V)
Is : float
Saturation current (A)
Vt : float
Thermal voltage (V)

Returns:
--------
Ib : float or array_like
 Base current (A)
"""
return Is * ([Link](Vbe / Vt) - 1)

def bjt_ebers_moll_complete(Vbe, Vbc, Is=1e-15, Bf=100, Br=5, Vt=0.0259):

"""
Complete Ebers-Moll model for all operating regions

Parameters:
-----------
Vbe : float
Base-emitter voltage (V)
Vbc : float
Base-collector voltage (V)
Is : float
Saturation current (A)
Bf : float
Forward current gain (forward active region)
Br : float
Reverse current gain (saturated/reverse regions)
Typically Br = 0.1-0.5 for small transistors
Vt : float
Thermal voltage (V)

Returns:
--------
Ic, Ib, Ie : float
Collector, base, emitter currents (A)

Operating Regions:
-------------------
1. Cutoff: V_BE << 0 → all currents ≈ 0
2. Forward Active: V_BE > 0, V_BC < 0 → amplification mode (normal operat
ion)
3. Saturation: V_BE > 0, V_BC > 0 → switch ON (fully conducting)
4. Reverse Active: V_BE < 0, V_BC > 0 → rare, poor gain
"""
# Exponential terms for both junctions
Ibe = Is * ([Link](Vbe / Vt) - 1)
Ibc = Is * ([Link](Vbc / Vt) - 1)

# Ebers-Moll equations (three-current form)

Ic = Bf * Ibe - Ibc
Ie = -(Ibe + Br * Ibc)
Ib = -(Ic + Ie)

return Ic, Ib, Ie

4.4 BJT Operating Point Analysis
𝑉𝐵𝐸 (V) Region 𝐼𝐵 (A) 𝐼𝐶 (A) 𝛽 Application
0.4 Weak 3.4 × 10−20 3.4 × 10−16 100 Cutoff
Forward
0.6 Forward 3.5 × 10−12 3.5 × 10−10 100 Amplification
0.7 Strong 3.5 × 10−10 3.5 × 10−8 100 Active region
Forward
0.8 Saturati 3.5 × 10−8 3.5 × 10−6 100 Switching ON
on

5. Practical Applications and Circuit Analysis

5.1 Diode Rectifier Circuit Analysis
def diode_rectifier_analysis():
"""
Analyze AC-to-DC rectifier using diode compact model
Input: 10 V amplitude, 60 Hz sine wave
Output: Half-wave rectified with diode forward voltage drop
"""
f = 60 # Hz
Vac_amplitude = 10
t = [Link](0, 0.05, 1000)
Vin = Vac_amplitude * [Link](2 * [Link] * f * t)

# Ideal diode model: conducts when Vin > 0.7V drop

Vout = [Link](Vin - 0.7, 0)
Id_rectified = shockley_diode(Vout)

# Circuit analysis results

peak_id = [Link](Id_rectified)
avg_id = [Link]([Link](Id_rectified))

print(f"Peak Rectified Current: {peak_id:.6f} A")

print(f"Average Forward Current: {avg_id:.6f} A")
print(f"Peak Inverse Voltage (PIV): {[Link](Vin):.2f} V")
print(f"Peak Output Voltage: {[Link](Vout):.2f} V")

Physical Analysis: - Forward conduction occurs when 𝑉𝑖𝑛 > 𝑉𝑓 ≈ 0.7 V - Peak output
voltage ≈ 10 - 0.7 = 9.3 V (diode drop) - Reverse voltage (PIV) ≈ 10 V (critical for diode
selection) - Ripple frequency = 2 × input frequency (60 Hz → 120 Hz ripple)

5.2 MOSFET Inverter Transient Response

def mosfet_gate_driver_response():
"""
Analyze MOSFET switching response to gate pulse
Gate pulse: 0 → 3V step input at t=10μs
 Supply voltage: 5V
Load resistor: 1kΩ
"""
t = [Link](0, 50e-6, 1000)
Vgs = [Link](t > 10e-6, 3.0, 0.0)
Vds_supply = 5.0

# Drain current response

Id_response = [Link]([mosfet_level1_id(vgs, Vds_supply)
for vgs in Vgs])

# Switch-on time (10%-90% rise)

on_indices = [Link](Id_response > 0.1 * [Link](Id_response))[0]
if len(on_indices) > 0:
t_on = t[on_indices[0]]
print(f"Turn-on delay: {t_on*1e6:.2f} μs")

off_indices = [Link](Id_response < 0.1 * [Link](Id_response))[0]

if len(off_indices) > 0:
t_off = t[off_indices[-1]]
print(f"Turn-off delay: {(t_off - 10e-6)*1e6:.2f} μs")

# Peak drain voltage swing

print(f"Peak drain current: {[Link](Id_response)*1e3:.3f} mA")

Transient Characteristics: - Turn-on is essentially instantaneous at gate voltage step (no

delay in Level 1) - Saturation current reached when 𝑉𝐺𝑆 − 𝑉𝑇𝐻 = 𝑉𝐷𝑆 - In reality, capacitive
charging causes finite switching delays

5.3 BJT Amplifier DC Operating Point

def bjt_amplifier_bias_analysis():
"""
Analyze BJT common-emitter amplifier DC bias point
Collector resistor: R_C = 1 kΩ
Supply voltage: V_CC = 10 V
Base resistor: R_B = 100 kΩ
"""
Vcc = 10.0
Rc = 1000
Rb = 100000

# For different V_BE values

Vbe_values = [Link]([0.5, 0.6, 0.65, 0.7, 0.75])

print("BJT Common-Emitter Amplifier DC Operating Point")

print("=" * 70)
print(f"{'V_BE (V)':<15} {'I_B (μA)':<15} {'I_C (mA)':<15} {'V_CE (V)':<1
5}")
print("-" * 70)
 for Vbe in Vbe_values:
Ib = bjt_ib_forward_active(Vbe) * 1e6 # Convert to μA
Ic = bjt_ic_forward_active(Vbe) * 1e3 # Convert to mA
Vce = Vcc - Ic*1e-3 * Rc # Ohm's law
print(f"{Vbe:<15.2f} {Ib:<15.3f} {Ic:<15.6f} {Vce:<15.2f}")

Bias Point Insights: - 𝑉𝐵𝐸 ≈ 0.7 V is typical operating point for silicon BJTs - Collector
voltage: 𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 - Base current: 𝐼𝐵 = 𝐼𝑆 (𝑒 𝑉𝐵𝐸/𝑉𝑇 − 1) ≈ very small - Collector-
emitter voltage: 𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 determines amplifier headroom

6. Model Limitations and Extensions

6.1 Level 1 Limitations and Solutions
Limitation Impact Typical Error Level 2+ Solution
No Early Effect 𝐼𝐷 10-30% error Add 𝜆𝑉𝐷𝑆 correction factor
independen
t of 𝑉𝐷𝑆 in
sat.
No Subthreshold Abrupt 100% error below Exponential subthreshold
cutoff at threshold term
𝑉𝑇𝐻
No Parasitic R Ignores 5-15% error at high Add 𝑅𝐷𝑆 , 𝑅𝐵 , 𝑅𝐶 models
series current
resistances
No Temperature Constant Varies with T 𝑉𝑇𝐻 (𝑇), 𝜇(𝑇) polynomial
parameters models
No Channel Flat 20-50% error Empirical 𝐼𝐷 modulation
Modulation saturation factors
curve
No Frequency DC model N/A for AC Add RC parasitic networks
Effects only
No Breakdown No Misses high-voltage Add breakdown current
avalanche behavior formulation
current

6.2 Temperature Effects on Model Parameters

Thermal voltage varies significantly with temperature:
𝑘𝑇 𝑇(𝐾)
𝑉𝑇 (𝑇) = = V
𝑞 11604.5
Temperature Dependence Examples: - 250 K (-23°C): 𝑉𝑇 = 0.0215 V - 300 K (27°C):
𝑉𝑇 = 0.0259 V (standard reference) - 350 K (77°C): 𝑉𝑇 = 0.0301 V - 400 K (127°C): 𝑉𝑇 =
0.0345 V
Impact on exponential current:
𝑉 𝑉
𝐼(𝑇2 ) = 𝐼(𝑇1 ) × exp [ − ]
𝑉𝑇 (𝑇2 ) 𝑉𝑇 (𝑇1 )
For a fixed voltage of 0.7 V: - 250K to 300K: Current increases by factor of ~2.0× - 300K to
350K: Current increases by factor of ~2.3×
6.3 Extended Model Implementation Framework
class ExtendedSemiconductorModel:
"""
Extended compact models with temperature effects and parasitic elements
"""

def __init__(self, device_type, T=300):

self.device_type = device_type
self.T = T # Temperature in Kelvin
[Link] = (8.617e-5 * T) / 1000 # Thermal voltage

def diode_with_temp(self, Vd, Is0=1e-12, Eg=1.12, T0=300):

"""Diode model with temperature correction"""
# Saturation current temperature dependence
Is = Is0 * (self.T / T0)**3 * [Link](
-Eg / (2*8.617e-5) * (1/self.T - 1/T0)
)
return Is * ([Link](Vd / [Link]) - 1)

def mosfet_with_early(self, Vgs, Vds, Vth=0.7, Kp=100e-6,

W=10e-4, L=1e-6, lambda_param=0.05):
"""MOSFET with Early Effect modulation"""
Vov = Vgs - Vth
K = Kp * (W / L)
if Vov <= 0:
return 0
if Vds < Vov:
return K * (Vov * Vds - 0.5 * Vds**2)
else:
# Early effect: I_D = I_D0 * (1 + λ * V_DS)
return K * 0.5 * Vov**2 * (1 + lambda_param * Vds)

6.4 Recommended Model Extensions

1. BSIM (Berkeley Short-Channel IGFET Model): Industry standard for advanced
CMOS with multiple refinements over Level 1
2. Temperature Modeling: Modify 𝑉𝑇𝐻 and 𝜇 as functions of 𝑇, typically polynomial
forms
 3. Parasitic Series Resistances: Add 𝑅𝐷𝑆 , 𝑅𝐵 , 𝑅𝐶 affecting high-current behavior
4. Channel Length Modulation: 𝐼𝐷 → 𝐼𝐷 (1 + 𝜆𝑉𝐷𝑆 ) improving saturation accuracy
5. Subthreshold Region: Exponential current formulation below threshold for low-
power circuits
6. Frequency-Dependent Effects: RC parasitic networks for small-signal AC analysis
7. Breakdown Phenomena: Avalanche breakdown current for high-voltage operation

7. Complete Implementation Framework

import numpy as np
import [Link] as plt

class SemiconductorCompactModel:
"""
Unified compact model framework for semiconductor devices
Supports diodes, MOSFETs, and BJTs with parameter storage
"""

def __init__(self, device_type, **params):

"""
Initialize compact model

Parameters:
-----------
device_type : str
Type of device: 'diode', 'mosfet', or 'bjt'
**params : dict
Device-specific parameters
"""
self.device_type = device_type
[Link] = params

def evaluate(self, *args):

"""Evaluate model for given voltages"""
if self.device_type == 'diode':
return self._diode_model(*args)
elif self.device_type == 'mosfet':
return self._mosfet_model(*args)
elif self.device_type == 'bjt':
return self._bjt_model(*args)
else:
raise ValueError(f"Unknown device type: {self.device_type}")

def _diode_model(self, Vd):

"""Evaluate diode model"""
Is = [Link]('Is', 1e-12)
n = [Link]('n', 1)
Vt = [Link]('Vt', 0.0259)
 return Is * ([Link](Vd / (n * Vt)) - 1)

def _mosfet_model(self, Vgs, Vds):

"""Evaluate MOSFET model"""
Vth = [Link]('Vth', 0.7)
Kp = [Link]('Kp', 100e-6)
W = [Link]('W', 10e-4)
L = [Link]('L', 1e-6)

Vov = Vgs - Vth

K = Kp * (W / L)

if [Link](Vds):
if Vov <= 0:
return 0
return K * 0.5 * Vov**2 if Vds >= Vov else \
K * (Vov * Vds - 0.5 * Vds**2)
else:
result = np.zeros_like(Vds, dtype=float)
if Vov > 0:
linear = Vds < Vov
result[linear] = K * (Vov * Vds[linear] - 0.5 * Vds[linear]**
2)
result[~linear] = K * 0.5 * Vov**2
return result

def _bjt_model(self, Vbe):

"""Evaluate BJT model"""
Is = [Link]('Is', 1e-15)
beta = [Link]('beta', 100)
Vt = [Link]('Vt', 0.0259)
return beta * Is * ([Link](Vbe / Vt) - 1)

# Example usage demonstrating unified framework

print("=" * 70)
print("UNIFIED SEMICONDUCTOR COMPACT MODEL FRAMEWORK")
print("=" * 70)

# Create device models

diode = SemiconductorCompactModel('diode', Is=1e-12, n=1)
mosfet = SemiconductorCompactModel('mosfet', Vth=0.7, Kp=100e-6, W=10e-4, L=1
e-6)
bjt = SemiconductorCompactModel('bjt', Is=1e-15, beta=100)

# Evaluate at test points

print("\nDevice Model Evaluations at Operating Points:")
print("-" * 70)
print(f"Diode at V_D = 0.7 V: {[Link](0.7):.6e} A")
print(f"MOSFET at V_GS = 1.0 V, V_DS = 1.0 V: {[Link](1.0, 1.0):.6e}
A")
print(f"BJT at V_BE = 0.7 V: {[Link](0.7):.6e} A")
print("\nAll models functioning correctly in unified framework.")

8. Conclusion
This document has presented comprehensive Python implementations of three
fundamental compact models used in semiconductor device simulation:
1. Diode (Shockley Model): Exponential I-V relationship governing silicon diode
behavior
2. MOSFET (Level 1): Long-channel approximation with linear and saturation regions
3. BJT (Ebers-Moll): Forward active region for amplification, complete formulation
for all regions
These analytical/empirical models provide: - Computational Efficiency: Fast evaluation
suitable for circuit simulation - Physical Insight: Clear relationship between voltages and
currents - Parameter Extraction: Measured device characteristics map directly to model
parameters - Industry Standard: SPICE-compatible implementations widely used in
circuit design
The provided Python framework enables: - Direct evaluation of compact models -
Parameter variation studies - Circuit-level simulations - Educational demonstrations of
device physics
Extensions to Level 2+ models and temperature-dependent formulations can be added
when higher accuracy is required for advanced semiconductor technologies.

References
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[Link]
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