0% found this document useful (0 votes)
7 views25 pages

Lecture 8

The document provides an overview of digital combinational modules, specifically focusing on decoders, encoders, multiplexers, and demultiplexers. It explains the functionality of these components, including their input-output relationships, truth tables, and design equations. Various examples illustrate the application of these modules in digital systems.
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
7 views25 pages

Lecture 8

The document provides an overview of digital combinational modules, specifically focusing on decoders, encoders, multiplexers, and demultiplexers. It explains the functionality of these components, including their input-output relationships, truth tables, and design equations. Various examples illustrate the application of these modules in digital systems.
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Faculty of Engineering, Egyptian

Chinese University

Digital Design
SET (111 )
Lecture (8) Digital
Combinational Modules

Part (II)
Dr. Islam Mohammed Ibrahim
Assistant professor of Communications and Electronics
Engineering
Decoders
• Decoding - the conversion of an n-bit input code to an m-bit output
code with n  m  2n such that each valid code word produces a
unique output code
• Circuits that perform decoding are called decoders. A decoder is a
minterm generator as shown in the figure.
• A decoder can have an additional input signal called the enable which
enables or disables the output generated by the decoder

Decoder block diagram.

Decoder with Enable block diagram.


Decoders
• Decoder is a digital module that has n inputs and 2n outputs such that
only on output is equal to “1” and all other outputs are equal to “0”.
Decoder Examples
(1) 1-to-2-Line Decoder
A 1-to-2 decoder has:
# of inputs, n = 1 and # of outputs, 2n = 21 = 2
Truth table Logic design equations
D0  A
D1  A

1-to-2 Decoder Symbol

(2) 2-to-4-Line Decoder


A 2-to-4 decoder has:
# of inputs, n = 2 and # of outputs, 2n = 22 = 4 Logic diagram
Decoders (Continued)
Decoder Examples (2) 2-to-4-Line Decoder

2-to-4 Decoder Symbol

2-to-4 Decoder Truth Table

Design equations
D0  A1 A0 2-to-4 Decoder Logic Diagram
D1  A1 A0
D2  A1 A0
D3  A1 A0
Decoders (Continued)
Decoder Examples (2) 2-to-4-Line Decoder with Enable

2-to-4 Decoder with


Enable Symbol
2-to-4 Decoder Truth Table

Design equations
D0  ENA1 A0
2-to-4 Decoder Logic Diagram
D1  ENA1 A0
D2  ENA1 A0
D3  ENA1 A0
Decoders (Continued) Design equations
Decoder Examples
(3) 3-to 8 Decoder

3-to 8 Decoder Symbol


3-to 8 Decoder Truth Table

Logic equations:

3-to 8 Decoder Logic diagram


Decoders (Continued)
Decoder Examples
(3) 3-to 8 Decoder using two 2-to 4 decoders

3-to 8 Decoder Symbol


3-to 8 Decoder Truth Table

3-to 8 Decoder using two


2-to 4 decoders
Decoders (Continued)
Decoder Examples
(4) 4-to-16 Decoder
IC decoders have multiple outputs to decode any combination of inputs. For
example the binary-to-decimal decoder shown here has 16 outputs – one for each
combination of binary inputs. Note that the inverted output.
4-to-16 Decoder Truth Table

4-to-16 Decoder Symbol


Decoders (Continued)
Decoder Examples (4)Design 4-to 16 Decoder using 2-to 4 decoders
Each group combination
4-to 16 Decoder Truth Table holds a unique value for A3A2

One Decoder can


be therefore used
with inputs: A3A2

Four more decoders are


4-to 16 Decoder using
needed for representing
2-to 4 decoders
each individual color
combination
Encoders
• Encoding - the opposite of decoding - the conversion of an m-bit input code to a
n-bit output code with n  m  2n such that each valid code word produces a
unique output code
• Circuits that perform encoding are called encoders
• The decimal to BCD is an encoder with an input for each of the ten decimal
digits and four outputs that represent the BCD code for the active digit. The
basic logic diagram is shown. There is no zero input because the outputs are all
LOW when the input is zero. Design equations

Example Decimal-to-BCD encoder


Encoder Truth Table
1
A0
2
3
A1

4
5 A2
6
7
8
A3
9
Encoder Symbol Encoder Logic Diagram
Decoders
 Extract “Information” from the code Only one
lamp will
 Binary Decoder turn on
● Example: 2-bit Binary Number

0 1
x1 0
Binary
x0 0 Decoder 0
0
Decoders
 2-to-4 Line Decoder
Y3

y3 Y2
I1 Binary
Decode y2
y1 Y1
I0 y0
r
Y0

I1 I0 Y3 Y2 Y1 Y0
I1
0 0 0 0 0 1 I0
0 1 0 0 1 0
Y3  I 1 I 0 Y2  I 1 I 0
1 0 0 1 0 0
1 1 1 0 0 0 Y1  I 1 I 0 Y0  I 1 I 0
Decoders
 3-to-8 Line Decoder Y7  I 2 I1 I0

Y6  I 2 I1 I0
Y7 Y5  I 2 I1 I 0
Y6
Y5 Y4  I 2 I1 I0
Decoder
Binary

I2 Y4 Y3  I 2 I1 I 0
I1 Y3
I0 Y2 Y2  I 2 I1 I 0

Y1 Y1  I 2 I1 I 0
Y0
Y0  I 2 I1 I0

I2
I1
I0
Decoders
 “Enable” Control Y3

Y3 Y2
I1
Binary
Decode
Y2
I0 Y1
E Y1
r Y0
Y0
E I1 I0 Y3 Y2 Y1 Y0
0 x x 0 0 0 0
I1
1 0 0 0 0 0 1 I0
E
1 0 1 0 0 1 0
1 1 0 0 1 0 0
1 1 1 1 0 0 0
Encoders
 Put “Information” into code Only one
switch
 Binary Encoder should be
● Example: 4-to-2 Binary Encoder activated
at a time

x1
x3 x2 x1 y1 y0

x2 y1 0 0 0 0 0
Binary
0 0 1 0 1
Encoder
y0 0 1 0 1 0
x3
1 0 0 1 1
Encoders (Continue)
Example: Octal-to-Binary Encoder

Truth Table

Design equations
A0  1  3  5  7
A1  2  3  6  7
A2  4  5  6  7 Symbol
D1 A0
D2
D3 A1
D4
D5 A2
D6
D7
Logic Diagram
Multiplexers
• Multiplexer is a combinational circuit, as shown, that has:
- n select bits
- 2n inputs.
- a single output
• It directs one of 2n input to the output based on a set of n select bits
• Logic circuits that perform selecting are called multiplexers. Selecting of data or
information is a critical function in digital systems and computers.
• A multiplexer selects information from an input line and directs the information to
an output line. A typical multiplexer has n control inputs (Sn - 1, … S0) called
selection inputs, 2n information inputs (I2n - 1, … I0), and one output Y.

Multiplexer functional block diagram


ECO122 Ch.4 Digital C. Modules
Multiplexers (Continued)
2-to-1-Line Multiplexer Truth Table
• Since 2 = 21, n = 1 Design equation:
• The single selection variable
S has two values: Y  S I o  SI1
– S = 0 selects input I0
– S = 1 selects input I1

• Note the regions of the multiplexer circuit shown:


– 1-to-2-line Decoder
– 2 Enabling circuits
– 2-input OR gate

Enabling
Decoder Circuits

Multiplexer Symbol I0
Y
S
I1

2-to-1-Line multiplexer logic diagram


Multiplexers (Continued)
Example: 4-to-1 MUX 4-to-1 MUX Truth Table Design equation:
Select Lines Output
Y  S1S 0 I o  S1S 0 I1
S1 So Y
0 0 I0  S1S 0 I 2  S1S 0 I 3
0 1 I1
1 0 I2
1 1 I3

Symbol

Symbol 4-to-1 MUX Logic diagram.


Multiplexers (Continued)
Example: 8-to-1 MUX 8-to-1 MUX Truth Table
S2 S1 S0 Y Design equation:
0 0 0 I0
0
0
0 1
0
I1
I2
Y  S 2 S1S 0 I o  S 2 S1S 0 I1
1

 S 2 S1S 0 I 2  S 2 S1S 0 I 3
0 1 1 I3
1 0 0 I4
1 0 1 I5
1 1 0 I6
1 1 1 I7  S 2 S1S 0 I 4  S 2 S1S 0 I 5
16-to-1 MUX Truth Table

8-to-1 MUX Symbol


Select Lines Output  S 2 S1S 0 I 6  S 2 S1S 0 I 7
S3 S2 S1 So Y
Example: 16-to 1 MUX 0 0 0 0 I0
Draw the logic diagram
0 0 0 1 I1
0 0 1 0 I2
Design equation:
0 0 1 1 I3
0 1 0 0 I4 Y  S3 S 2 S1S 0 I o  S3 S 2 S1S 0 I1
0 1 0 1 I5
0 1 1 0 I6  S3 S 2 S1S 0 I 2  S3 S 2 S1S 0 I 3
0 1 1 1 I7
1 0 0 0 I8
1 0 0 1 I9
...................................
1 0 1 0 I10
1 0 1 1 I11  S3 S 2 S1S 0 I14  S3 S 2 S1S 0 I15
1 1 0 0 I12
16-to-1 MUX Symbol 1 1 0 1 I13 Draw the logic diagram
1 1 1 0 I14
ECO122 Ch.4 Digital C. Modules
1 1 1 1 I15
Multiplexers (Continued)
Example: Quad 2-to-1 Line MUX
• It does multiplexing of two 4-bit numbers.
• It has a 4-bit output and a single select line
• It is built using four 2x1 MUXes

Block diagram
Multiplexers (Continued)

Example: Quad
2-to-1 Line MUX

Logic diagram
Demultiplexers (DMUX)
• DeMultiplexer is a combinational circuit, as shown, that has:
- n select bits
- a single input
- 2n outputs.
• It directs the input to one of 2n outputs based on a set of n select bits.
• Selecting of data or information is a critical function in digital systems and
computers.
• A DeMultiplexer selects information from the input line and directs the
information to one of the output lines. A typical DeMultiplexer has n control
inputs (Sn - 1, … S0) called selection inputs, one input X and 2n data outputs
(D2n - 1, … D0).

DeMultiplexer functional block diagram


Demultiplexers (DMUX) Design equation:
Example 1-to 4-line DMUX D0  S1S 0 X D1  S1S 0 X

D2  S1S 0 X D3  S1S 0 X

1-to 4-line DMUX Symbol

1-to 4-line DMUX Truth Table

Select Lines Output

S1 So Di = X
0 0 D0
0 1 D1
1-to 4-line DMUX Logic diagram
1 0 D2
1 1 D3
Demultiplexers (DMUX) (Continued)
1-to-16-line DMUX Truth Table
Example 1-to 16-line DMUX Data Select Inputs Output
Di = X
Design equation: S3 S2 S1 S0
0 0 0 0 D0
D0  S3 S 2 S1S 0 X 0 0 0 1 D1
D1  S3 S 2 S1S 0 X 0 0 1 0 D2

D2  S3 S 2 S1S 0 X
0 0 1 1 D3
0 1 0 0 D4
..................... 0 1 0 1 D5
D15  S3 S 2 S1S 0 X 0 1 1 0 D6
0 1 1 1 D7
1 0 0 0 D8
1 0 0 1 D9
1-to-16-line DMUX Symbol
1 0 1 0 D10
1 0 1 1 D11
1 1 0 0 D12
1 1 0 1 D13
Draw the DMUX Logic diagram 1 1 1 0 D14
1 1 1 1 D15

You might also like