1.

1 Design development work

Design and development can be divided into four stages, each with different definitions: –
 Task definition (informative definition),
 Conceptual stage (cardinal definition),
 design stage (formative definition), and
 Implementation stage (manufacturing definition).

Product Planning:

Phase 1: Concept Development

Phase 2: System-Level Design
Phase 3: Detail Design
Phase 4: Testing and Refinement
Phase 5: Production Ramp-Up
 Sequential Circuits:

Sequential circuits are essential components in digital systems, enabling the storage and
manipulation of data. In the design and development of advanced digital systems, various
sequential circuits are utilized. These include

 Seven-segment displays for visual output,

 Registers for temporary data storage,
 Flip-flops for memory elements,
 Counters for counting and sequencing operations, and
 Timers for time-based functions (Harris & Harris, 2011).
1. Sequential Circuits:

Sequential circuits are fundamental building blocks in digital systems, enabling the storage and
manipulation of data. When considering alternative arrangements for sequential circuits,
designers must evaluate factors such as speed, power consumption, and complexity.

For example, different types of flip-flops, such as

  D flip-flops,
 JK flip-flops, or
 T flip-flops,

Can be used based on the specific requirements of the system (Harris & Harris, 2011).
Additionally, designers can explore the use of different types of counters, such as synchronous or
asynchronous counters, to achieve specific functionality (Katz &Borriello, 2012

 Combinatorial Functions:

Combinatorial functions play a crucial role in digital system design by implementing logical
operations.

 Encoders are used to convert multiple inputs into a coded output,

 Decoders perform the reverse operation,
 Multiplexers select one of many inputs to be routed to a single output, and
 Demultiplexersdistribute a single input to multiple outputs (Katz &Borriello, 2012).
These functions are vital for data manipulation and control in advanced digital systems.

2. Combinatorial Functions:

Combinatorial functions play a crucial role in digital system design by implementing logical
operations. When considering alternative arrangements for combinatorial functions, designers
must evaluate factors such as speed, area utilization, and power consumption.

Different types of

 Encoders,
 Decoders,
 Multiplexers, and
 Demultiplexerscanbe chosen based on the specific requirements of the system.

For example, priority encoders can be used when prioritizing multiple inputs, while multiplexers
with different numbers of inputs can be selected based on the complexity of the system (Katz
&Borriello, 2012).
 ). Operation Sheet:2.1
Operation Title: Assembling an Embedded System

Instructions:

 Gather all the necessary components and tools.

 Ensure a clean and well-lit workspace.
 Follow the assembly steps carefully.
 Double-check the connections and alignments before proceeding.

Precautions:

 Handle electronic components with care to avoid damage.

 Disconnect power sources before making any connections.
 Avoid static electricity by grounding yourself and using an anti-static mat.

Tools and Requirements:

Microcontroller board

 Sensors and actuators

 Connecting wires
 Soldering iron
 Screwdriver
 Multimeter
 Power supply

Procedures:

 Identify the specific functions and requirements of the embedded system.

 Mount the microcontroller board on a suitable platform.
 Connect the required sensors and actuators to the microcontroller board following the
datasheets and pin diagrams.

Quality Criteria:

 All connections are secure and properly soldered.

  The microcontroller board is powered up and functioning correctly.
 Sensors and actuators respond accurately to inputs.
 There are no loose or tangled wires.
 The assembled embedded system passes functional testing and performs the desired tasks
successfully.
 Please note that the operation sheet is truncated, and the remaining steps and quality
criteria are missing
 Sequential Circuits:

Sequential circuits are essential components in digital systems, allowing for the storage and
manipulation of data. In the event of an unplanned situation, such as a malfunctioning seven-
segment display, register, flip-flop, counter, or timer, it is important to follow the organization's
policies for troubleshooting and rectification. This may involve conducting a thorough analysis
of the circuit, checking for loose connections, faulty components, or incorrect programming. If
necessary, replacement of defective components or reprogramming of the circuit may be
required to restore proper functionality.

1. Seven-Segment Display: Check for any incorrect or missing segments in the display.
Verify the connections and ensure that the correct signals are being applied. Rectify any
faulty connections or components. –

2. Register: Verify that the register is storing and manipulating data correctly. Check for
any data corruption or incorrect outputs. Rectify any issues with the flip-flops or data
paths. –
3. Flip-Flops: Test the flip-flops individually to ensure proper functioning. Check for any
issues with clock signals, input/output connections, or timing violations. Rectify any
faulty flip-flops or connections. –
4. Counters: Verify that the counters are generating the expected sequence of numbers.
Check for any issues with clock signals, reset signals, or incorrect outputs. Rectify any
faulty components or connections. –
 5. Timers: Test the timers to ensure accurate time measurement or generation. Check for
any timing inaccuracies or incorrect outputs. Rectify any faulty components or
connections.

 Combinatorial Functions

Combinatorial functions, including encoders, decoders, multiplexers, and demultiplexers, play a

vital role in digital systems by enabling data manipulation and routing. If an unplanned situation
arises, such as incorrect output from an encoder or decoder, it is important to adhere to the
organization's policies for resolution. This may involve verifying the input signals, checking for
incorrect wiring or faulty components, and ensuring proper programming or configuration. If
necessary, recalibration or replacement of components may be required to rectify the issue and
restore the desired functionality.

 Combinatorial Functions:

Combinatorial functions can suffer from malfunctions such as incorrect logic operations, signal
propagation delays, or faulty inputs/outputs. To identify and rectify these malfunctions, the
following steps can be taken: -

1. Encoders: Verify that the encoders are correctly converting input signals into coded
outputs. Check for any incorrect or missing outputs. Rectify any faulty components or
connections. –
2. Decoders: Test the decoders to ensure proper conversion of coded inputs into multiple
outputs. Check for any incorrect or missing outputs. Rectify any faulty components or
connections. –
3. Multiplexers: Verify that the multiplexers are correctly selecting and routing input
signals to the desired output. Check for any signal distortion or incorrect routing. Rectify
any faulty components or connections. –
4. Demultiplexers: Test the demultiplexers to ensure proper routing of a single input to the
desired output. Check for any signal distortion or incorrect routing. Rectify any faulty
components or connections.
1.1.1 Design and Simulation of Multiplexers and Demultiplexers

Data Transmission in Communication Systems and Boolean Logic Implementation

A multiplexer (abbreviated as MUX) is a combinational circuit that selects binary information

from one of many input lines and directs it to a single output line. The selection of a particular
input line is controlled by a set of selection lines.

Figure 2-1Block Diagram of a 2:1 MUX

[Link] are 2^n input lines and n selection lines whose bit combinations determine which
input is selected.

A multiplexer can be visualized as a data router which routes data from one of multiple input
lines (determined by select lines) to a single output line. This can be used in communication
systems to transmit multiple signals using a single channel (transmission link).

MUX can be implemented using Logic gates such as AND, OR, NAND etc. or Transmission
gates (Tristate Buffers).

A demultiplexer (abbreviated as DEMUX) performs the reverse operation of a multiplexer. It

routes data from a single input line to one of multiple output lines (determined again by select
lines).
 Figure 2-2 Block Diagram of a 1:2 DEMUX

Figure 2-3 Communication System making use of MUX and DEMUX

Figure 2-4Timing Diagram of a 4:1 MUX

When S1S0 = 00, D0 is selected (00 is the binary representation of 0)

When S1S0 = 01, D1 is selected (01 is the binary representation of 1)
 When S1S0 = 10, D2 is selected (10 is the binary representation of 2)
When S1S0 = 11, D3 is selected (11 is the binary representation of 3)

 Design of 2:1 MUX:

A 2:1 MUX has two input lines (I0 and I1), one output line (Y) and one select line (S).
If S=0, Y=I0 and if S=1, Y=I1

Table 1Truth Table of 2:1 MUX

From the truth table, the Boolean expression for the output of 2:1 MUX can be obtained as:

A 2:1 MUX can be implemented using two 2-input AND gates (1 7408 IC), one 2-input OR gate
(1 7432 IC) and one inverter (1 7404 IC)

Figure 2-5NAND Logic Implementation

Tristate buffers have a normal input, an output, and a control input that determines the state of
the output. When the control input is equal to 1, the output is enabled and the gate behaves like a
conventional buffer with the output equal to the normal input. When the control input is 0, the
output is disabled and the gate goes to a high-impedance state (the tristate buffer becomes an
open circuit), regardless of the value in the normal input. Due to the presence of the high
impedance state, the output of several tristate buffers can be tied together to form a common line
without any loading effects.

Figure 2-6Behavior of a Tristate Buffer

Figure 2-7Implementation of 2:1 MUX using Tristate Buffers

 Code for Verilog HDL Simulation:

modulemux_2x1_case(i0,i1,s0,out);
input i0,i1,s0;
output reg out;
always @(*)
begin
case(s0)
1'b0:out=i0;
1'b1:out=i1;
endcase;
end
endmodule
 Figure 2-8Simulated waveforms for a 2:1 MUX

 Design of 4:1 MUX:

A 4:1 MUX has four input lines (I0,I1,I2 and I3), one output line (Y) and two select lines (S1
and S0).
Table 2Truth Table of 4:1 MUX

From the truth table, the Boolean expression for the output of 4:1 MUX can be obtained as:

A 4:1 MUX can be implemented using four 3-input AND gates (2 7411 IC), three 2-input OR
gates (1 7432 IC) and two inverters (1 7404 IC).
 Figure 2-9NAND Logic Implementation

Figure 2-10Tristate Buffer Implementation

The 2 by 4 decoder gives the outputs S1'S0' , S1'S0 , S1S0' , S1S0 which are then given as the
control signals to the tristate buffers to select the desired input.

A 4:1 MUX can also be implemented using three 2:1 MUXes. Here s1 and s0 are select lines and
w0, w1, w2 and w3 are the input lines.

Figure 2-114:1 MUX can also be implemented 2:1 MUXes.

 Code for Verilog HDL Simulation:

Modulemux_4x1_case(i0,i1,i2,i3,s,out);
input i0,i1,i2,i3;
input [1:0]s;
outputreg out;
always @(*)
begin
case(s)
2'b00:out=i0;
2'b01:out=i1;
2'b10:out=i2;
2'b11:out=i3;
endcase
end
endmodule

Figure 2-12Simulated waveforms for a 4:1 MUX

 Implementation of Boolean Functions using MUX:

A n-variable Boolean Function can be implemented easily using a 2^n : 1 MUX
For example, consider the following
Table 3truth table of 2^n : 1 MUX
This function can be easily implemented using a 16:1 MUX. The 4 inputs A, B, C and D should
be given as the 4 select lines of the MUX.

For the input combination ABCD = 0, the input selected by the MUX is I0. From the truth table
we can deduce that I0 = 1. Similarly, the other inputs are given to the MUX.

Figure 2-13Implementation of the given 4 variable Boolean Function using 16:1 MUX
However, this is inefficient as the MUX logic complexity increases as number of select lines
increases (compare the implementation of 2:1 MUX and 4:1 MUX). So we try to reduce the
number of select lines.
A n variable boolean function can be implemented with a 2^(n-1):1 MUX and one inverter.
Consider the 4 variable function specified before, it can be implemented using an 8:1 MUX and
an inverter. Three of the inputs, A,B and C in that order are given as the select lines. The input
values are determined from the truth table, as a function of the fourth input D.
For a particular combination of input values ABC, D can take two values D=0 and D=1. The
Boolean function can also take two values f=0 and f=1. 4 different situations arise for a particular
combination of ABC values.
XXX - indicates a particular combination of ABC values (ranging from 000 to 111)

Table 4combination of ABC

Here f is zero irrespective of the value of D.

Hence for the particular combination of ABC, f = 0
Table 5 combination of ABC

Here f has the same value as D.

Hence for the particular combination of ABC, f = D
Table 6 combination of ABC
Here f is the complement of D.
Hence for the particular combination of ABC, f = D'
Table 7combination of ABC, f = D'

Here f is one irrespective of the value of D.

Hence for the particular combination of ABC, f = 1

The Truth table for the 4 variable Boolean function specified above, could be redrawn as:
Table 8 : 4 variable Boolean function
 Figure 2-14Implementation of a 4 variable Boolean Function using a 3:1
If we try to reduce the selection lines further, some extra logic gates might be introduced.
An efficient implementation of a n variable Boolean function can be done using a 2^(n-1) : 1
MUX and an inverter.

 Design of 1:2 DEMUX:

A 1:2 DEMUX has one input line (I), two output lines (Y1 and Y2) and one select line (S).
If S=0, Y0=I and Y1=0; if S=1, Y0=0 and Y1=I

Table 9Truth Table of a 1:2 DEMUX

The Boolean expressions for the outputs Yo and Y1 can be given as

A 1:2 DEMUX can be implemented using two 2-input AND gates (1 7408 IC), and one inverter
(1 7404 IC)

Figure 2-151:2 DEMUX can be implemented using two 2-input AND gates (1 7408 IC