ARSI UNIVERSTY
MICRO PROCESSOR AND ASSEMPLY LANGUAGE
INDIVIDUAL ASINGNMENT
NAME: ABDULHAKIM MOHAMMED
[Link]: UGR/15495/16
Submited to : mr GEMEDA
Introduction
The Intel 8086 and 8088 microprocessors were among the earliest 16-bit
microprocessors and formed the foundation for the x86 architecture
widely used today. Introduced in the late 1970s, they are CISC
(Complex Instruction Set Computing) processors designed for general-
purpose computing.
Though similar in architecture, the main difference between the two lies
in their external data bus width: the 8086 has a 16-bit data bus, while the
8088 has an 8-bit data bus. This affects system design, performance, and
compatibility with peripherals
2. Pin Configuration and Description
Both processors have 40 pins with similar pin functions, but the difference in data bus
width affects how data pins are used.
Major Pin Groups:
Address Bus (A0–A19): 20 pins — carry the physical memory address,
allowing up to 1 MB of memory addressing.
Data Bus:
8086: 16 pins (D0–D15)
8088: 8 pins (D0–D7)
Control Signals: Includes Read/Write, Interrupts, and status signals.
Clock Input: Provides timing reference.
Power Supply Pins: Vcc (+5V) and Ground.
Segment Control Pins: To select memory segments
3. Internal Architecture
3.1. Execution Unit (EU)
Contains the Arithmetic Logic Unit (ALU), general-purpose registers,
segment registers, and control circuits.
Responsible for executing instructions and processing data.
Registers include:
General purpose: AX, BX, CX, DX (each 16-bit, divided into AH
and AL 8-bit halves)
Segment registers: CS (Code), DS (Data), SS (Stack), ES (Extra)
Pointer and index registers: SP, BP, SI, DI
Instruction Pointer (IP)
Flags Register
3.2. Bus Interface Unit (BIU)
Handles communication with memory and I/O.
Contains:
Segment registers
Address generation logic
Instruction queue (prefetch queue of 6 bytes in 8086 and 4 bytes in
8088)
Fetches instructions and places them in the queue for the EU.
4. Memory Addressing
20-bit address bus → can address up to 1 MB of memory (2^20 = 1,048,576
bytes).
Uses segmented memory model: physical address = (segment × 16) + offset.
Segment registers allow accessing memory in 64 KB blocks.
Segment registers:
CS: points to current code segment.
DS: points to data segment.
SS: points to stack segment.
ES: extra segment for data.
5. Modes of Operation
Minimum mode (MN/MX# = 1):
Single processor environment.
Processor handles control signals directly.
Maximum mode (MN/MX# = 0):
Multi-processor environment.
6. Clock and Timing
External clock input (CLK) typically 5 MHz to 10 MHz.
Processor uses the clock for synchronization.
Each instruction takes varying clock cycles depending on complexity.
8088 can be used with slower peripherals due to 8-bit bus.
7. Interrupts
8086/8088 support 256 interrupt vectors.
Two main types:
Maskable Interrupts (INTR): Can be disabled via software.
Non-Maskable Interrupt (NMI): Cannot be disabled, highest
priority.
Interrupt Acknowledge (INTA#) signals acknowledge the interrupt and fetch
vector.
8. Input/Output
Supports 256 input ports and 256 output ports.
I/O mapped separately from memory (I/O mapped addressing).
I/O instructions:
IN: read from port.
OUT: write to port.
9. Differences Between 8086 and 8088
Feature 8086 8088
Data Bus Width 16-bit 8-bit
Instruction Queue
6 bytes 4 bytes
Size
External Data Pins 16 8
System Cost & Higher (needs 16-bit Lower (8-bit memory
Complexity memory) compatible)
Performance Faster due to wider bus Slightly slower
Used in high- Used in IBM PC (cost
Application
performance systems sensitive)
10. Applications
8086: Used in early PCs, embedded controllers, industrial applications
needing 16-bit processing.
8088: Used in IBM PC XT and compatible computers due to cheaper 8-bit bus
design.
11. Conclusion
The Intel 8086 and 8088 microprocessors revolutionized computing by
introducing 16-bit processing power and a segmented memory model,
allowing efficient and flexible memory management. The 8088’s 8-bit
external bus enabled cost-effective system design, making it the choice for
IBM PCs and early personal computers. Both remain foundational in
understanding modern CPU archite