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Cambridge International AS & A Level

Computer Science Study Guide:
Information Representation
Number Systems

Denary Numbers
Denary numbers, also known as decimal numbers, are base-10 numbers.
They use ten symbols (0-9) to represent digits. The value of a denary
number is determined by the place value of each digit.

Example: The denary number 346 is interpreted as follows:

Place Value Digit Product

10
2
= 100 3 300
10
1
= 10 4 40
10
0
= 1 6 6

Binary Numbers
Binary numbers are base-2 numbers. They use two symbols (0 and 1),
called bits. Similar to denary numbers, the value is determined by place
values, but the place values are powers of 2.

Example: The binary number 101110 is interpreted as follows:

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Place Value Digit Product

2
5
= 32 1 32
2
4
= 16 0 0
2
3
= 8 1 8
2
2
= 4 1 4
2
1
= 2 1 2
2
0
= 1 0 0

The sum of the products (32 + 8 + 4 + 2 = 46) gives the denary equivalent.

Hexadecimal Numbers
Hexadecimal numbers are base-16 numbers. They use sixteen symbols
(0-9 and A-F, where A-F represent 10-15). The value is determined by
place values, which are powers of 16.

Number Systems and Conversions

Place Values and Hexadecimal Numbers
The value of a number is determined by its place values. For example, consider the
hexadecimal number 2A6:

Place Value Digit Product of Digit and Place Value

16² = 256 2 512

16¹ = 16 A (10) 160
16⁰ = 1 6 6

Adding these products (512 + 160 + 6) gives the denary (base-10) equivalent: 678.

A nibble is a group of four bits. One hexadecimal digit represents a nibble.

Therefore, a byte (8 bits) can be represented by two hexadecimal digits.

Binary Hexadecimal Denary

00001010 0A 10
11111111 FF 255

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Leading zeros are omitted when converting binary to hexadecimal on paper, but in
actual binary code, all positions in a byte must contain either a 0 or a 1. This
consistency is reflected in the hexadecimal representation.

Hexadecimal representations of bytes are commonly seen in memory dumps

(indicating errors during program execution) and character code charts. Octal (base-
8) numbers are sometimes encountered but can generally be ignored.

Binary-Denary Conversions
Method 1: Summing Place Values

To convert a binary number to a denary number, add the place values of all digits
with a value of 1 (as illustrated in Table 1.02 - not included in this provided text).

Method 2: Successive Multiplication and Addition

Start with the most significant bit. Successively multiply by two and add the next
digit to the result. For example, converting 11001 to denary:

1 * 2 = 2; 2 + 1 = 3; 3 * 2 = 6; 6 + 0 = 6; 6 * 2 = 12; 12 + 0 = 12; 12 * 2 = 24; 24 + 1 =

25.

Denary to Binary Conversion (Method 1):

1. Find the largest power of 2 less than the denary number.

2. Write its binary representation (a 1 followed by zeros).
3. Subtract this power of 2 from the denary number.
4. Repeat steps 1-3 with the remainder until the remainder is 0.

Example: Converting 78 to binary:

1. 64 (2⁶) → 1000000
2. 78 - 64 = 14
3. 8 (2³) → 1001000
4. 14 - 8 = 6
5. 4 (2²) → 1001100
6. 6 - 4 = 2
7. 2 (2¹) → 1001110
8. 2 - 2 = 0

Denary to Binary Conversion (Method 2): Successive Division

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Successively divide the denary number by 2, recording the remainder at each step.
The binary equivalent is the sequence of remainders in reverse order.

Example: Converting 246 to binary:

Division Quotient Remainder

246 / 2 123 0
123 / 2 61 1
61 / 2 30 1
30 / 2 15 0
15 / 2 7 1
7/2 3 1
3/2 1 1
1/2 0 1

Therefore, the binary equivalent of 246 is 11110110.

To check an 8-bit binary result, remember that 7 bits can hold values up
to 127 (2⁷ - 1), while 8 bits can hold values up to 255 (2⁸ - 1).

Hexadecimal Conversions
Hexadecimal to Denary: Convert to binary first, then to denary.

Hexadecimal to Binary: Convert each hexadecimal digit to its 4-bit binary equivalent
(e.g., F → 1111, E → 1110).

Binary to Hexadecimal: Group the binary digits into sets of four, starting from the
least significant bit, and convert each group to its hexadecimal equivalent.

Task 1.01
Convert the following:

96, 215, and 374 (denary) to hexadecimal.

B4, FF, and 3A2C (hexadecimal) to denary.

Question 1.01
Do computers ever use hexadecimal numbers?

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Number Types and Quantities

Table 1.05 (not included in this provided text) lists various denary number types
(integer, signed integer, fraction, etc.).

Quantities with units can be expressed in several ways:

23,567 m
23.567 x 10³ m
23.567 km

Decimal Prefixes:

Prefix Symbol Factor

kilo k 10³
mega M 10⁶
giga G 10⁹
tera T 10¹²

In computing, these prefixes were historically used with slightly different meanings
(e.g., kilo often meant 1024 instead of 1000). This ambiguity is now resolved by
using binary prefixes:

Binary Prefixes:

Prefix Symbol Factor

kibi Ki 2¹⁰
mebi Mi 2²⁰
gibi Gi 2³⁰
tebi Ti 2⁴⁰

For readability, use one denary digit before the decimal point when presenting
numbers.

Number Representation

Data Size and Magnitude

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When dealing with numerical results from calculations (e.g., file sizes), the initial
answer might not have the ideal number of digits before the decimal point. To fix this,
we use a magnitude factor.

For example:

34,560 bytes = 34,560 / 1024 KiB = 33.75 KiB (kibibytes)

3,456,000 bytes = (3,456,000 / 1024) / 1024 MiB = 3.296 MiB (mebibytes)

If calculations involve values with different magnitude factors, convert them to the
same factor first. For instance, to find how many 2.4 MiB files fit on a 4 GiB memory
stick:

(4 GiB * 1024 MiB/GiB) / 2.4 MiB = 1706.67 files

Internal Coding of Numbers

This section focuses on integer values. The coding of non-integer values (real
numbers) is discussed in another chapter.

Computers store integers for various purposes. Sometimes, a simple positive integer
is stored as a binary number; the only decision is how many bytes to use. Using two
bytes (16 bits) allows representing values from 0 to (216 - 1) = 65,535.

Often, we need to represent signed integers (positive or negative). One method is

sign and magnitude representation: use an extra bit to indicate the sign (0 for +, 1
for -).

However, twos complement form is more commonly used. Here are the definitions:

Ones complement: Inverts each bit (0 becomes 1, 1 becomes 0).

Twos complement: Add 1 to the ones complement.

A faster method to find the twos complement: Start at the least significant bit and
move left, ignoring zeros until the first 1 (also ignore this 1). Invert the remaining bits.

Example: Converting 10100100 to twos complement:

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Leave the rightmost "100" unchanged.

Change "10100" to "01011".
Result: 01011100

To represent a positive integer in twos complement:

1. Convert to binary.
2. Add a leading 0.

To represent a negative integer in twos complement:

1. Convert the absolute value to binary.

2. Add a leading 0.
3. Find the twos complement.

(See Table 1.08 in the original text for examples)

To convert a positive twos complement number to denary:

1. Ignore the leading 0.

2. Convert the remaining binary to denary.

To convert a negative twos complement number to denary:

Method 1:

1. Convert to the positive twos complement equivalent.

2. Convert to denary.
3. Add a minus sign.

Method 2:

1. Sum place values, treating the most significant bit as negative.

(See Worked Example 1.03 for an illustration)

Key features of twos complement:

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Only one representation of zero.

Successive values are obtained by adding 1 (rollover from all 1s to all 0s).
Adding a leading 0 to an unsigned binary value makes it a positive twos
complement representation.
Twos complement conversion changes the sign of a number.
You can add leading zeros (positive) or ones (negative) without changing the
value.

Binary Arithmetic
Recall denary addition: Start with the least significant digits, and if the sum exceeds
9, carry-over 1.

Binary addition is similar:

0+0=0
0+1=1
1 + 1 = 0 (carry 1)
1 + 1 + 0 = 0 (carry 1)
1 + 1 + 1 = 1 (carry 1)

Binary Addition
The addition of binary numbers follows these rules, performed from right to left
(least significant bit to most significant bit):

1 + 0 = 1 (no carry)
1 + 1 = 0 (carry 1)
0 + 1 + (carried 1) = 0 (carry 1)
1 + 1 + (carried 1) = 1 (carry 1)

Example: Adding the binary equivalents of denary 14 (1110) and denary 11 (1011):

1110 + 1011 = 11001 (denary 25)

Binary Subtraction
Binary subtraction also starts from the rightmost digit and proceeds left. A key
difference is "borrowing":

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0-0=0
0 - 1 = 1 (after borrowing 1 from the next position)
1-0=1
1-1=0

Example: Subtracting the binary equivalent of denary 11 (1011) from denary 14

(1110):

1110 - 1011 = 0011 (denary 3)

Overflow in Binary Arithmetic 位

When using a fixed number of bits (e.g., a nibble or a byte) to store binary numbers,
overflow can occur if the result of an addition or subtraction exceeds the maximum
value that can be represented.

Example: Adding denary 63 (+63) to denary 63 (+63) using 8 bits (one byte):

00111111 + 00111111 = 01111110 (+126) (Correct)

However, if we add denary 96 (+96) to denary 96 (+96):

01100000 + 01100000 = 11000000 (Incorrect, interpreted as negative due to

leading 1 in two's complement)

Two's Complement Subtraction

Two's complement representation simplifies subtraction. To subtract a number (B)
from another number (A):

1. Convert B to its two's complement.

2. Add the two's complement of B to A.

Binary Coded Decimal (BCD)

BCD uses a nibble (4 bits) to represent a single denary digit (0-9). Codes 1010 to
1111 are not used.

There are two main BCD representations:

One BCD digit per byte: Uses one byte, leaving four bits unused.
Packed BCD: Packs two 4-bit BCD codes into a single byte.

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Example: Representing denary 8503:

Representation Byte 1 Byte 2 Byte 3 Byte 4

One BCD digit per byte 00001000 00000101 00000000 00000011

Packed BCD 10000101 00000011

BCD Arithmetic: Simple binary addition of BCD values can lead to incorrect results if
the result exceeds 9 in a nibble. A correction value (0110) is added when an invalid
BCD value (greater than 9) is produced.

Example of BCD Addition Correction: Adding 0.26and0.85 in packed BCD. The

correction (0110) is added to any nibble resulting in a value greater than 9.

Lecture Notes: Data Representation

Internal Coding of Text
To store text in a computer, we need a character code: a unique binary code for each
character. Many schemes exist, with ASCII being the oldest.

ASCII Code
ASCII (American Standard Code for Information Interchange): A
character encoding standard for electronic communication.

The 7-bit version (US ASCII) was standardized by ANSI. Codes are usually presented
in tables (see example below). The most significant bit is often set to zero.

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Binary Code Hexadecimal Equivalent Character Description

00000000 00 NUL Null character

00000001 01 SOH Start of heading
00100000 20 Space Space
00100001 23 # Number
00110000 30 0 Zero
00110001 31 1 One
01000001 41 A Uppercase A
01000010 42 B Uppercase B
01100001 61 a Lowercase a
01100010 62 b Lowercase b

Key facts about ASCII:

A limited number of codes represent non-printing control characters (used in

data transmission or terminal handling).
Most codes are for characters on a standard keyboard (letters, punctuation,
digits, symbols).
Codes for numbers and letters are sequential (adding 1 to the code for '7' gives
the code for '8').
Uppercase and lowercase letters differ only in bit 5, allowing easy conversion.
This numeric coding is only for stored, displayed, or printed text; other schemes
are for internal use.
Variations exist across software and countries, primarily affecting control
characters. Some used control codes for small graphic icons.

Extended ASCII: Uses all eight bits of a byte, often referred to as ISO
Latin-1, including accented characters from European languages.
Variations also exist for this standard.

Question 1.02
Many years ago, a byte was defined as six bits. If a character was represented by one
byte, only 2 = 64 characters would be representable. Many characters would be
6

unavailable.

Unicode

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Unicode: A computing industry standard for the consistent encoding,

representation, and handling of text expressed in most of the world's
writing systems.

ASCII doesn't cover all characters; hence, Unicode was developed (alongside
Universal Character Set (UCS), ISO/IEC 10646). The goal is to represent any text,
including all languages. UTF-8 is a popular version using 1, 2, 3, or 4 bytes.

UTF-8 Byte Formats:

Byte Length Format Bits for Code Point

1 0??????? 7
2 110????? 10?????? 11
3 1110???? 10?????? 10?????? 16
4 11110??? 10?????? 10?????? 10?????? 21

The number of available codes depends on free bits. For example, the 2-byte format
has 11 free bits, allowing 2 = 2048 codes.
11

Code Point: A character code in Unicode, identified by U+ followed by a 4-

digit hexadecimal number.

U+0000 to U+00FF duplicate Latin-1.

Images
Images are stored for display or printing. They can be created using graphics
packages or captured via photography/scanning.

Vector Graphics
In vector graphics (e.g., from drawing or CAD packages), each component is a
drawing object. The image is stored as a vector graphic file containing a drawing list
with commands and attributes for each object. Attributes include geometric data
(e.g., circle center, radius) and properties (line thickness, style, color, fill color).

Scalable: Vector graphics are scalable because object dimensions are

relative to a canvas, allowing resizing without quality loss.

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Task 1.05: Construct a partial drawing list for a given vector graphic. (This would
involve defining a format and listing commands for the image's objects based on
measurements.)

Image Representation

Vector Graphics
Vector graphic files represent images using geometric shapes.
Calculations are performed to avoid image distortion when the image is
displayed.
They can only be displayed directly on a graph plotter.
Conversion to a bitmap is often necessary for other display types.

Bitmaps
A bitmap is a digital image composed of a grid of pixels. Each pixel has a
specific color and position. The smallest identifiable component of a
bitmap image is a pixel.

Used for images not consisting of geometric shapes (e.g., photos).

Created by scanning, screenshots, or graphics packages.
Stored as a two-dimensional matrix of pixels.
Pixel: A simple construct with a position and color. Shape is irrelevant
(rectangle, circle, or dot).

Color Representation

Bits per Pixel Color Representation

1 bit Black or white

4 bits Simple greyscale
8+ bits Sufficient range of colors for realistic representation

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Color depth: Number of bits per pixel.

Bit depth: Number of bits to store each primary color (RGB). Often used
interchangeably with color depth, but more precisely describes bits per color
channel.

8-bit color depth: 256 colors.

8-bit bit depth (per primary color): 16,777,216 colors.

Resolution
Image resolution: Number of pixels per row × number of rows (in the bitmap
file).
Screen resolution: Resolution of the monitor displaying the image. Both must
be considered for screen displays.
A bitmap file doesn't define pixel or image physical size. Scaling doesn't change
pixel count. Magnification reveals individual pixels.

File Size
Larger files use more memory and take longer to display/transmit.
Vector graphics usually use less memory than bitmaps.
Bitmap file size calculation: (number of pixels per row) × (number of pixels per
column) × (color depth in bits) = total bits. Divide by 8 to get bytes.

Worked Example 1.04:

Bit depth: 8 (24 bits per pixel since 8 bits per RGB component)
Resolution: 72 dpi (dots per inch), 5 inches × 3 inches
Pixels per row: 5 inches × 72 pixels/inch = 360 pixels
Pixels per column: 3 inches × 72 pixels/inch = 216 pixels
Total pixels: 360 × 216 = 77,760 pixels
Total bits: 77,760 pixels × 24 bits/pixel = 1,866,240 bits
Total bytes: 1,866,240 bits / 8 bits/byte = 233,280 bytes
Size in kibibytes: 233,280 bytes / 1024 bytes/KiB = 227.8 KiB

Bitmap files include a file header containing information about the

graphic's construction (color depth, resolution, etc.). This increases the file
size beyond the pixel data.

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Bitmap vs. Vector Graphics

Feature Vector Graphic Bitmap

Architectural, engineering, manufacturing Images, photos, web

Use Case
designs pages
Printing Requires conversion to bitmap Directly printable
File Size Smaller Larger
Image
Geometric shapes Pixels
type

Sound Representation
Natural sound: Variations in pressure detected by the ear. Contains many waves
with defined frequencies. Amplitude varies in a continuous, irregular pattern.
Electronic storage/transmission: Analog sound converted to binary code.

Sound Encoding
Sound encoder: Converts analog sound to digital data. Has two components:
Band-limiting filter: Removes high-frequency components undetectable
by the human ear.
Analog-to-digital converter (ADC): Samples the sound wave's
amplitude at regular intervals. Approximates amplitude using defined
amplitude levels. Accuracy depends on how closely the sample aligns
with an amplitude level.

Lecture Notes: Sound and Image Coding

Sampling and Quantization

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Actual amplitude: Approximately halfway between the two closest defined

values.
Sampling resolution: Determined by the number of bits used to store
amplitude values. Using only three bits allows for eight levels. 16 bits provides
reasonable accuracy for most digitized sound.
Sampling rate: Number of samples taken per second. Must adhere to the
Nyquist theorem: sampling frequency must be at least twice the highest
frequency of the sound. Higher sampling rates and resolutions increase file size.

Compression Techniques
Two categories of compression exist:

Lossless compression: Reduces file size without information loss. The original
file can be recreated.
Lossy compression: Reduces file size with some information loss. The original
file cannot be perfectly recovered. Often, a combination of lossless and lossy
methods are used.

Lossless Compression Examples

Run-length encoding (RLE): Works well with bitmap files by replacing
sequences of the same byte value with a code defining the byte value and the
number of repetitions (count). For example, four repetitions of 01100110 could
be replaced with 00000100 01100110. Methods exist to distinguish the count byte
from data bytes.
Huffman coding: Used for text and sound files. Analyzes the frequency of
characters or amplitude values and assigns shorter codes to the most frequent
ones. It employs the prefix property: no code begins with the sequence of bits
representing a shorter code to avoid ambiguity during decompression.

Example of Huffman coding:

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Code Character

10 e
01 t
111 o
110 h
0001 l
0000 p
0011 w
0010 z

Lossy Compression Examples

Sound file compression: Successive sampled values often don't change
drastically. The file can be converted to a file of amplitude differences, and
lower sample resolution can be used to store the differences. Alternatively, data
can be transformed to the frequency domain, frequencies barely audible
recoded with fewer bits, then transformed back to the time domain.
Bitmap compression: Reduced color depth creates a coding scheme; each
pixel's code is changed to the closest color in the new scheme.
Vector graphic compression: Converting to Scalable Vector Graphics (SVG)
format, which uses a markup language description suitable for lossless
compression.

Image File Formats

JPEG, GIF, PNG, and TIFF are examples of image file formats, each potentially using
different compression techniques.

Exam-Style Questions
Question 1: A file contains binary coding. Two successive bytes are 10010101 and
00110011.

Question 2: A designer wants to include multimedia components on a web page. The

questions cover vector vs. bitmap graphics, file size calculations (considering
resolution and color depth), and lossless/lossy compression techniques.

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Question 3: An audio encoder creates a song recording; the questions explore the
encoder's components.

Lecture Notes: Audio Encoding and

Networking Technologies
Analog-to-Digital Conversion (ADC)
Need for ADC: An ADC is necessary to convert the continuous analog signal of
sound into a discrete digital format that can be processed and stored by a
computer.

Sampling Rate and Resolution

Sampling Rate: The number of samples taken per second. A higher sampling
rate captures more detail, resulting in higher-fidelity audio. Measured in Hertz
(Hz).

Sampling Resolution: The number of bits used to represent each sample.

Higher resolution (more bits) means a wider range of amplitude values can be
represented, leading to a greater dynamic range and reduced quantization
noise.

Pre-ADC Component: Microphone

Component: A microphone is used before the ADC.

Purpose: The microphone converts acoustic sound waves into an electrical

analog signal which the ADC can then digitize.

Two's Complement Representation

Example: Converting 124 (denary) to 8-bit two's complement:
Step Calculation Binary

1 Find the binary equivalent of 124 01111100

This is a positive number, so no need for two's complement
2 01111100
conversion.

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Hexadecimal Conversion: Converting 01111100 (binary) to hexadecimal: 7C

Binary Coded Decimal (BCD)

BCD Representation of 359: 0011 0101 1001

Use of BCD: BCD is useful in applications where decimal representation is

crucial, such as in displays showing numerical values (e.g., digital clocks,
calculators).

Digital Sound Representation

Sampling Resolution: The precision with which each sample is represented
(bits per sample).

Sampling Rate: The number of samples taken per second (samples/second or

Hz).

CD Music Storage Calculation

Bytes per second: (44,100 samples/second) * (16 bits/sample) * (2 channels) /
(8 bits/byte) = 176,400 bytes/second

Megabytes for a 4-minute track: (176,400 bytes/second) * (60 seconds/minute)

* (4 minutes) / (1024 bytes/kilobyte) / (1024 kilobytes/megabyte) ≈ 41 MB

MP3 Compression
How music quality is retained: MP3 uses lossy compression techniques that
discard parts of the audio signal that are less perceptible to the human ear. This
significantly reduces file size without a major perceived loss in audio quality.

Network Evolution

Wide Area Network (WAN)

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1970s: Primarily used to connect mainframes and minicomputers across large

distances. Key benefits included running jobs on remote computers, accessing
remote data archives, and electronic message transmission.

Modern WAN: Characterized by use by organizations to connect sites, leasing

from PSTN, use of fiber-optic cables, switch-to-switch transmission, and no
direct end-system connection to the WAN.

Local Area Network (LAN)

1980s: Enabled the connection of microcomputers/PCs within a single location
(room, building, site).

Benefits: Reduced software installation costs (application servers), centralized

file storage and sharing (file servers), shared printers, and enabled electronic
communication (email).

Modern LAN: Typically owned by the organization, uses twisted pair cables or
WiFi, contains a device for connecting to other networks, and includes directly
connected end-systems.

Internetworking
1990s: The widespread use of the Internet (internetworking) started.

2000s: Mobile devices and wireless networking became common, greatly

expanding network access.

Client-Server Model

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Early Use: In large organizations with internal networks, often using a powerful
central server.

Modern Use: The client is typically a web browser, and the server is a web
server hosting applications.

Thin Client: Sends input and receives output from the server.

Thick Client: May perform some processing locally before sending to or after
receiving data from the server; may even download and run the application
locally.

File Sharing
Client-Server: Files are stored on a server and accessed by clients.

Peer-to-Peer: Files are distributed among multiple peers, each acting as both
client and server. Advantages include avoiding network congestion.

Lecture Notes: Data Communications

Systems
Client-Server Model Advantages
Control over file downloading and use: Organizations can manage access to
files.
Enhanced malware protection: Centralized storage on regularly scanned
servers reduces risks.

Network Topologies
Five Requirements:

1. Sender
2. Receiver
3. Transmission medium (air or cables)
4. Message
5. Protocol

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Transmission Modes:

Simplex: One-way data flow.

Half-duplex: Two-way data flow, but not simultaneously.
Full-duplex: Simultaneous two-way data flow.

Message Types:

Broadcast: One-to-all communication.

Multicast: One-to-many communication.
Unicast: One-to-one communication.

Network Topologies:

Point-to-point: A dedicated link between two systems. Transmission can be

simplex or duplex; messages are unicast.
Bus: A single link shared by multiple end-systems (multi-point connection).
Messages are broadcast. Resilient to individual end-system or link failures.
Mesh: Each end-system has a point-to-point connection to every other end-
system. Transmission is duplex; messages can be unicast, multicast, or
broadcast. Requires significant cabling.
Star: Each end-system connects to a central device. Transmission is duplex;
messages from the central device can be unicast, multicast, or broadcast.
Resilient to end-system or link failures, but the central device is a single point of
failure. Currently the most common topology.
Hybrid: A collection of LANs with different topologies or technologies. Requires
a special connecting device.

Transmission Media
Cable Types:

Twisted pair: Uses copper; lowest cost, lowest bandwidth, most susceptible to
interference and attenuation.
Coaxial: Uses copper; higher cost and bandwidth than twisted pair, less
susceptible to interference and attenuation.
Fiber-optic: Uses fiber optics; highest cost and bandwidth, least susceptible to
interference and attenuation.

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Cable Bandwidth/Data Attenuation at Need for

Cost Interference
Type Rate High Frequency Repeaters

Twisted
Lowest Lowest Affected Worst More often
Pair
Coaxial Higher Higher Most affected Less affected More often
Fiber- Least
Highest Much higher Least affected Less often
Optic affected

Wireless Transmission:

Radio: Electromagnetic radiation; good penetration through solid barriers.

Microwave: Electromagnetic radiation; higher bandwidth than radio.
Infrared: Electromagnetic radiation; highest bandwidth, but poor penetration of
solids; suitable for indoor use.

Bandwidth: The range of frequencies that a transmission medium can

handle, governing the data transmission rate. Attenuation: The reduction
in signal strength over distance.

Interference: Any unwanted signal that disrupts the transmission. This

can be caused by other electronic devices or environmental factors.

(Figure 2.05, 2.06, and 2.07 would be included here if they were available.)

Question 2.01
Twisted pair cable can be shielded or unshielded. What are the options for this? How
does shielding affect the use of the cable?

Lecture Notes: Data Transmission and

Networking
Cable vs. Wireless Transmission
Guided Media: Cables (e.g., coaxial, twisted pair, fiber-optic)
Unguided Media: Primarily radio waves; microwaves and infrared can be
directed.

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Note: The term "unguided" is slightly misleading, as some wireless

transmissions can be focused.

Government Regulations: Wireless frequencies often require permits. Cable

installations need landowner permission.
Global Communication: Fiber-optic cables and satellite transmission are the
main competing technologies.
Interference: More significant with wireless transmissions, dependent on
frequency usage. Wireless often requires fewer repeaters.
Mobile Use: Only wireless transmission is feasible for mobile phones.
Home/Small Office: Wired and wireless are equally efficient; wireless is often
preferred for ease of setup.

Satellite Communication
Satellite Altitudes:
GEO (Geostationary Earth Orbit): Highest altitude, over the equator;
used for long-distance communication; three satellites needed for global
coverage.
MEO (Medium-Earth Orbit): Used for GPS; ten satellites needed for
global coverage.
LEO (Low-Earth Orbit): Supplement mobile phone networks; fifty
satellites needed for full coverage (hundreds currently in orbit).

Geostationary: The satellite orbits at the same speed as the Earth's

rotation, appearing stationary from a point on Earth.

Van Allen Belts: Areas with high levels of charged particles that interfere with
satellites.
Transmission Delays: Greater distances with satellites cause transmission
delays.
Applications: GPS, internet access in remote areas. High-speed fiber optics
have reduced the reliance on satellites for general internet communication.

Calculating Transmission Time to MEO

Satellite

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Task 2.01: Calculate the approximate time taken for a transmission from the Earth's
surface to a medium-Earth-orbit satellite. (Assume the speed of light is 300,000
km/s). This calculation requires knowing the distance to the MEO satellite, which was
not provided in the lecture transcript.

LAN Hardware

Wired LANs
Early LANs: Used coaxial cables.
Current LANs: Primarily use twisted pair cables, with fiber-optic cables
becoming increasingly common.
Bus Configuration: Series of sockets linked by cables; terminators prevent
signal reflection; each end-system connects via an RJ-45 connector.
Star Configuration: Each end-system connects to a central device (hub, switch,
or router); cables are longer than in a bus configuration.
Repeaters: Used to extend bus networks by amplifying signals over long
distances.
Bridges: Connect two segments of a bus network; store network addresses of
end-systems in each segment.
Network Interface Card (NIC): Has a unique network address identifying the
end-system.
Central Devices: Hubs, switches, and routers; switches are the most common in
modern star networks.

Wireless LANs (WiFi)

Standard: IEEE 802.11
Central Device: Wireless Access Point (WAP); can be part of a wired network.
End-System Requirement: Wireless Network Interface Card (WNIC).

Ethernet Ethernet

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Standard: IEEE 802.3

Generations: Standard/Traditional, Fast, Gigabit, 10 Gigabit, 100 Gigabit (data
transfer speed capabilities indicated).
Legacy Ethernet: Bus or star configuration with a hub; broadcast transmissions;
CSMA/CD (Carrier Sense Multiple Access with Collision Detection) to handle
collisions.

CSMA/CD: A method for handling collisions in shared network mediums.

It involves checking for signal activity before transmitting, continuously
monitoring for collisions, and transmitting a jamming signal if a collision
occurs.

Modern Ethernet: Switched star configuration; switch controls transmission to

specific end-systems; full-duplex links prevent collisions; high activity levels
require buffering capabilities in the switch.

Lecture Notes: Computer Networks

Ethernet
CSMA/CD is no longer needed in modern Ethernet because collisions are
impossible due to buffering incoming messages until the cable is free.
Further details on Ethernet can be found in Chapter 17, Section 17.04.
Discussion Point: Research different Ethernet versions, identify the version
used in your systems, and estimate its performance lifespan.

Internet Infrastructure
The Internet is a massive, organically evolved internetwork, not a centrally
designed entity.
Its structure lacks a formal definition but exhibits a hierarchical nature.

Internet Service Providers (ISPs)

An ISP initially provided internet access to individuals or companies. Now,
this function is often split into tiers: access ISPs, middle-tier/regional
ISPs, and tier 1 (backbone) ISPs. Connections between ISPs are
facilitated by Internet Exchange Points (IXPs).

Discussion Point: Identify familiar ISPs or major internet content providers.

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Routers
A router is a device at connection points (nodes) in the internet's mesh
network, responsible for selecting the optimal transmission route. Details
on router functionality are in Chapter 17, Section 17.05.

The Internet's core is a mesh of fiber-optic cables, with routers at each node.

Question 2.02
How near are you to an under-the-sea Internet fibre-optic cable?

Legacy Infrastructure Support ☎

The Public Switched Telephone Network (PSTN), historically used for voice
communication (POTS), plays a significant role in supporting the internet. (See
Chapter 17 for details).
Early networking relied on modems for digital data transmission over analog
phone lines (dial-up connections).
Leased lines provided dedicated, high-speed connections, often used for WANs
or MANs.
Modern PSTNs use fiber optics and digital technology, offering improved leased
lines and ISP services (broadband and WiFi hotspots).

Mobile Internet Access

Mobile phone companies act as ISPs, providing internet access through cell
towers and appropriate software on mobile devices.

Internet Applications

World Wide Web (WWW)

The World Wide Web (WWW) is a distributed application running on
the internet, distinct from the internet itself. It's a vast collection of
websites and web pages linked by hyperlinks.

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Cloud Computing
Cloud computing provides computing services usually via the internet.
Options include private clouds (managed on-site or outsourced) and
public clouds (managed by third-party providers).

Cloud services (infrastructure, platform, software) are accessible through

browsers.
Advantages: enhanced performance, increased storage, software
development/testing facilities, cost-effectiveness.
Disadvantages (public clouds): data privacy concerns, reliance on the provider
for data security.

Bit Streaming
Bit streaming transmits compressed media (audio, video) as a sequence
of bits for efficient delivery. It's used in "on-demand" streaming, where
playback begins before the entire file is downloaded.

Media is compressed to reduce file size for transmission.

Streaming Media

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Streaming media: Media data sent in a continuous flow to a user's computer,

played using media player software.

Two categories:

On-demand streaming: Media data stored in a buffer on the user's

computer.
Real-time/live transmission: Content generated and delivered
simultaneously (e.g., live sporting events). Delivery to many users
managed by content provider servers.

Crucial point: Maintaining consistent playback speed (creation speed = delivery

speed). A song recorded at 4 minutes should not play at 6 minutes.

Bit rate: Determines content delivery speed. Examples:

Poor quality video: 300 kbps

Reasonably good audio: 128 kbps

Buffer: Delivers data at the correct bit rate. Data sent to the buffer at a higher
rate to account for delays.

Media player: Monitors buffer fullness, controlling bit rate based on high and
low-water marks. Buffer size must be large enough to prevent overflow.

Network bandwidth: Limits transmission rate to the buffer. Broadband

essential for satisfactory streaming (e.g., 2.5 Mbps for good quality movies).
Multiple compression levels often provided to accommodate varying
bandwidths.

Buffer Management Example

Scenario: Video streaming with:

Buffer size: 1 MiB

Low-water mark: 100 KiB
High-water mark: 900 KiB
Incoming data rate: 1 Mbps
Video display rate: 300 kbps

Calculations (assuming buffer at low-water mark):

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Time (seconds) Data input (KiB) Data output (KiB) Buffer content (KiB)

2 2048 600 1648

4 4096 1200 3544
6 6144 1800 5344
8 8192 2400 7144
10 10240 3000 8344
12 12288 3600 10944

Estimation: Buffer fills to high-water mark (900 KiB) between 8 and 10 seconds.

Calculation (transmission halted at high-water mark): Time to drop to low-water

mark depends on the video display rate:
H ighW aterM ark−LowW aterM ark 800KiB
T ime = = ≈ 2.67seconds
V ideoDisplayRate 300kbps

IP Addressing
TCP/IP: Standard protocol suite for internet communication, including IP
addressing.

IPv4: Current internet addressing scheme (32-bit addresses).

Allows approximately 4 billion addresses (232).

Addressing scheme: Hierarchical structure with netID (network) and hostID

(host).

netID: Used for initial transmission routing. hostID: Examined upon

arrival at the identified network.

IPv4 Address Classes: Original scheme with classes A, B, and C, each with a
different netID and hostID bit allocation.

Class Class Identifier NetID Bits HostID Bits

A 0 7 24
B 10 14 16
C 110 21 8

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Problems with the original scheme: Insufficient Class B netIDs and too few
hostIDs in Class C addresses.

Dotted decimal notation: User-friendly representation of IP addresses (each

byte represented as decimal).

Example: 10000000 00001100 00000010 00011110 becomes

[Link]

Classless Inter-domain Routing (CIDR)

CIDR: Improves the addressing scheme. Retains netID/hostID but allows
flexible splitting.

Method: 8-bit suffix added to specify the number of bits used for netID.

Example: Suffix 21 means 21 bits for netID, 11 bits for hostID (211 =
2048 hosts).

CIDR IPv4 Addressing

With CIDR (Classless Inter-Domain Routing), the most significant bits are no longer
used to define address classes. Existing Class A, B, and C addresses can be used
with suffixes 8, 16, and 24, respectively.

Example of Class C Address in CIDR Format

Task 2.03 asked for a binary code example of a Class C address in CIDR format and
its dotted decimal representation. (Specific example omitted as none was provided in
the transcript).

Sub-netting
Sub-netting improves host ID efficiency by structuring it. For example, a medium-
sized organization with 150 employees across seven LANs (six departments + head
office) could use sub-netting.

Without sub-netting, seven individual Class C netIDs would be needed, resulting in

1792 (256 * 7) possible addresses, leaving 1642 unused.

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With sub-netting, one Class C netID is sufficient. For example, [Link] to

[Link]. The top three bits of the host ID could represent LANs, and the
remaining five bits, workstations.

Example: 00001110 (workstation 14 on head office LAN 0)

Example: 01110000 (workstation 16 on LAN 3)

This leaves only 106 unused addresses, which is reasonable for future expansion.
The other six unused netIDs remain available for other organizations.

Network Address Translation (NAT)

NAT (Network Address Translation) allows large organizations to use private
networks (intranets) with the same protocols as the internet while maintaining
internet connectivity. It deviates from the principle of unique IP addresses.

NAT uses a single public IP address visible on the internet. Internal IP

addresses are chosen from three ranges (specific ranges omitted as they
were not needed according to instructions): [Link] - [Link],
[Link] - [Link], [Link] - [Link]

Each address can be simultaneously used by many networks. The NAT box's
software examines each transmission, optionally including security checks.

Static and Dynamic IP Addresses

Internet Service Providers (ISPs) manage IP addresses. A dynamic address changes
and is reallocated when a user disconnects; a static address remains constant (often
at extra cost).

IPv6 Addressing
IPv6 uses a 128-bit addressing scheme (2128 addresses), enabling more complex
address structures. Addresses are written in colon-hexadecimal notation, broken into
16-bit parts represented by four hexadecimal characters. Abbreviations are allowed.

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IPv6 Address Comment

68E6:7C48:FFFE:FFFF:3D20:1180:695A:FF01 A full address

72E6::CFFE:3D20:1180:295A:FF01 :0000:0000: has been replaced by ::
6C48:23:FFFE:FFFF:3D20:1180:95A:FF01 Leading zeros omitted
::[Link] An IPv4 address used in IPv6

Domain Names
The Domain Name System (DNS), created in 1983, allocates readable domain
names for internet hosts and translates them to IP addresses. It's a hierarchical,
distributed database on numerous domain name servers. The hierarchy includes root
servers (replicated) at the top, with zones and primary/secondary name servers
below. There are over 250 top-level domains.

Lecture Notes: Networking and

Computer Systems
Domain Names and Name Resolution
Domain Names: Part of a URL that identifies a web page or email address.
They use top-level domains (TLDs) like .com, .edu, .uk, etc. A domain is
structured hierarchically (e.g., .[Link]).

Name Resolution: The process of looking up a domain name to find its

corresponding IP address.

Name Resolution Outcomes:

Authoritative Answer: If the queried domain is controlled by the server, a

correct IP address is returned.
Cached Answer: If the domain isn't directly controlled but its IP is in the
server's cache, that IP is returned (potentially outdated).
Recursive Query: If the domain is remote, the query goes to a root server,
then to the appropriate TLD server, and so on, until an authoritative
answer is found.

Network Topologies and Transmission Media

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File Sharing: Can be done via client-server or peer-to-peer networking.

LAN Topology: The most common topology for a Local Area Network (LAN) is
the star topology.

Transmission Media:

Copper Cables: Twisted pair and coaxial cables.

Fiber-Optic Cables: Offer high bandwidth and low signal attenuation.
Wireless: Radio, microwave, and infrared technologies.

Choosing a Medium: Factors to consider include bandwidth, attenuation,

interference, and the need for repeaters.

CSMA/CD: Carrier Sense Multiple Access with Collision Detection—a method

to detect and avoid message collisions in shared media.

The Internet and the World Wide Web

The Internet: The largest internetwork globally.

ISPs (Internet Service Providers): Provide access to the Internet.

Internet Infrastructure: Relies on Public Switched Telephone Networks

(PSTNs) and cell phone companies.

The World Wide Web: A distributed application accessible via the Internet.

IP Addressing: Currently uses IPv4, with IPv6 being a future standard.

DNS (Domain Name System): Translates domain names into IP addresses.

Computer System Hardware

A computer system needs to handle data processing, storage, and
input/output. The CPU is central to data processing.

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Data Storage: Terminology varies, but key concepts include:

Primary Storage (Memory): Directly accessible by the processor (e.g.,

RAM).
Secondary Storage: For long-term storage (e.g., hard drives, SSDs).

Memory Hierarchy: A conceptual model showing the trade-offs between

access speed, cost, and capacity for different storage components (registers,
cache, main memory, secondary storage). Faster components are typically more
expensive and have smaller capacities.

Storage Medium Types:

Integral: Built-in components like hard disks or solid-state drives (SSDs).

Removable: Items like floppy disks, optical discs, or magnetic tape
cartridges.
Peripheral: Devices connected externally.

Computer Systems Overview

Data Storage Devices
There are several possibilities for data storage, categorized as follows:

Portable:

Hard drive
Memory stick
Memory card (usually flash memory, but floppy disks or optical discs are
alternatives) Often used for personal backups.

Remote (accessible via network):

Cloud storage
Magnetic tape
RAID (Redundant Arrays of Independent Disks)
SAN (Storage-Area Network) Often used for backups.

Data Input/Output Methods InOut

Data Output:

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Screen display
Hardcopy (printer or plotter)
Virtual headset display
Speaker
Writing to storage devices (listed above)
Network transmission

Data Input:

Keyboard/keypad
Screen interaction (icons, menus, pointing devices, touchscreens)
Game controller
Scanner
Microphone (with voice recognition)
Reading from storage devices (listed above)
Network transmission

I/O Subsystem: A crucial component that manages data input/output,

including data transfer to/from internal storage (hard disk or SSD).

Embedded Systems
Embedded systems are prevalent in manufactured items with mechanical or electrical
parts. They contain a processor, memory, and I/O capabilities.

Microcontroller: A single-chip implementation of an embedded system's

processor, memory, and I/O.

Input/Output: Can range from internal-only to full user interfaces (e.g., mobile
phones).

Advantages: Special-purpose, single-function designs leading to economies of

scale through mass production.

Historical Disadvantages: Limited memory for programming and difficult chip

replacement for error correction.

Modern Challenges: Increased network connectivity (IoT – Internet of Things)

improves functionality but introduces security vulnerabilities.

Memory Components

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RAM (Random-Access Memory): Accessed at any location independently; also

called direct-access memory or read-write memory. It's volatile (data lost when
powered off).

DRAM (Dynamic RAM): Uses capacitors; requires frequent recharging. Cheaper

and higher density than SRAM.
SRAM (Static RAM): Uses flip-flops; retains data indefinitely while powered
on. Faster access time than DRAM.

Cache Memory: Typically SRAM due to its speed advantage. Used in

general-purpose computers.

ROM (Read-Only Memory): Random-access, but data cannot be written to while in

use. Non-volatile (data retained when powered off). Used for storing unchanging
data or programs (e.g., bootstrap programs).

ROM Types:
1. Data installed during manufacturing.
2. PROM (Programmable ROM): Programmed by the system builder.
3. EPROM (Erasable PROM): Data erased with UV light; reprogrammable
but requires removal from the circuit.
4. EEPROM (Electrically Erasable PROM): Data erased electrically;
reprogrammable without removal.

Buffers
Buffers are used to manage data transfer speed mismatches between sender and
receiver. They function as queues, ensuring data order. Typically located in computer
memory.

Secondary Storage Devices

Device Drivers and Drives
For any hardware device, its operation requires appropriate software,
called the device driver. This is different from a drive, which initially
referred to the hardware housing a storage medium and physically
transferring data. However, these terms are often used interchangeably
(e.g., hard disk, hard disk drive, hard drive).

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Magnetic Media
Magnetic tape: The first storage device, predating computers.
Hard disk: Specifically invented for computer storage, using magnetization to
write data.
Read/write head: Uses the principle that magnetization affects electrical
properties (read) and vice-versa (write). The two heads are often combined.
Binary representation: Two states of magnetization are interpreted as 1 or 0.

Hard Disk Construction

Multiple platters (disks).
Each platter has a read/write head per side.
Platters spin in unison at the same speed.
Read/write heads are on actuator arms for movement.
Head movement is synchronized.
Air cushion prevents head-platter contact.

Data is stored in concentric tracks (tracks sharing the same center),

formatted into sectors (defined number of bytes), which are the smallest
storage unit. Related data on different disks can be stored on the same
tracks (a cylinder), accessible with one head movement. File storage
might lead to fragmentation, degrading performance. Defragmentation
programs can fix this.

A hard drive is a direct-access read/write device (any sector can be

chosen), but data within a sector is read sequentially.

Optical Media
Optical storage evolved from non-computing technologies (like the
compact disc). Technologies include CD-ROM, CD-RW, DVD, and Blu-ray.

Optical Disc Drive Principles

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One spiral track from inner to outer edge.

Disc spins while laser moves across the track.
Pits and lands: Differences in laser reflection from pits and lands are
interpreted as 1s and 0s.
For CD-RW and DVD-RW, a special alloy changes state (crystalline or
amorphous) based on laser heat, affecting reflectivity.
Direct access due to laser movement.
Data formatted into sectors.
Storage capacity depends on how close binary digits can be, affected by
rotation speed and especially laser wavelength (shorter wavelengths allow
better focus).

Solid-State Media
Solid-state storage uses flash memory (semiconductor technology with
no moving parts).

Flash Memory Characteristics ️

Uses transistors as memory cells.
NAND flash: Frequently used technology, resembling a NAND logic gate.
Memory cells are connected in series.
NAND flash controller: Handles writing and reading.
Block erasure: Blocks of memory cells can be erased at once. Writing requires
prior block erasure. Blocks contain multiple pages, and one page can be read at
once.
Used in memory cards and USB flash drives.
Alternative technologies like PRAM are under development.
Can substitute hard disks (solid-state drives).

Lecture Notes: Computer Storage and

Output Devices
Solid State Drives (SSDs)

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Advantage over traditional hard drives: No moving parts, leading to faster

access speeds and potentially greater durability.
Degradation: Despite lacking moving parts, SSDs experience gradual material
degradation with continuous use. This can be detected and corrected.

Storage Technologies
An extension question encourages research into current storage
technologies, comparing cost, capacity, and access speed for both laptop
internal storage and peripheral devices. The goal is to identify viable,
uncompetitive, and emerging technologies.

Output Devices

Screen Displays
Pixel Concept: Screen displays use pixels, each composed of three sub-pixels
(red, green, blue). Varying light emission from sub-pixels creates a range of
colors.
Cathode Ray Tube (CRT): Original technology where the inner screen surface
(coated in phosphor) emits light when electrons hit it. Pixels are lit by
controlling the electron beam direction.
Liquid Crystal Display (LCD): Dominant flat-screen technology with individual
cells containing liquid crystals. Backlighting illuminates the pixel matrix; each
pixel controls light transmission. LEDs typically provide the backlighting. The
manipulation of liquid crystal molecule alignment via voltage changes the
polarization of light, thus altering the display.

Virtual Reality (VR) Headsets

Key Components: Two eye-pieces fed paired images from a controlling system,
creating a 3D sensation. Images can be captured photographically or generated
using 3D graphics. Head movements or controllers allow users to interact with
the 3D environment.

Hard-Copy Output: Text

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Inkjet Printers: Print by moving a printhead across paper, depositing ink

through nozzles. Ink is supplied from cartridges.
Laser Printers:
1. Drum receives electric charge.
2. Drum rotates step-by-step.
3. Laser beam, controlled by mirrors and lenses, discharges selected
positions on the drum.
4. Process repeats to create a full-page electrostatic image.
5. Charged toner sticks to discharged positions.
6. Toner transfers to charged paper.
7. Paper passes through heated rollers to fuse the toner.
8. Drum discharges for the next page.
Color Printing: Requires separate toners (cyan, magenta, yellow, black).
Image quality depends on dots per inch (DPI).

Hard-Copy Output: Graphics

Bitmap Printing: Standard printing technologies can print bitmaps.
Vector Graphics: Vector graphic files are converted to bitmaps before printing
or screen display.
Plotters: Used for accurate hard-copy representations in technical applications.
Use pens to draw on large sheets of paper controlled by sprockets. Software
creates drawings directly from vector graphics files.
3D Printers: Create physical objects layer by layer from a 3D design. A nozzle
squirts material onto the printer bed, and the process repeats for each layer.
The final product requires curing to ensure layers adhere and the material is in
its final form.

Input Devices

The Keyboard
Functionality: Keyboard input (text or actions) is converted into character codes
and transmitted to the processor. The processor, controlled by the operating
system, displays the character or performs the action.
Internal Components: The keyboard contains electrical circuitry.

Keyboard Operation

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The keyboard contains a key matrix consisting of rows and columns of wires.
Pressing a key closes a circuit at the intersection of a row and column wire. The
microprocessor continuously checks for closed circuits. Upon detecting a closed
circuit, the microprocessor uses data in the ROM (Read-Only Memory) to identify the
corresponding character code and sends it to the screen.

Screen Interaction
Early computer systems relied solely on keyboards for input, often
navigating menus via numerical input.

The advent of Graphical User Interfaces (GUIs) in the 1980s revolutionized screen
interaction. GUIs use icons controlled by pointing devices like a mouse, transforming
the screen into both an input and output device.

Touch Screens 触摸屏

Early touch screens used CRT (Cathode Ray Tube) or flat screens with emitters
(infrared light or ultrasound) on the sides and detectors on the opposite side. A finger
blocking the signal allowed for detection.

Modern touch screens utilize layered technology:

Resistive: Two layers separated by a space; pressure causes contact, creating a

voltage divider to determine position.
Capacitive: Uses the capacitance change caused by a finger touching the glass
screen. Projective Capacitive Touch (PCT) with mutual capacitance is the most
advanced, detecting multiple touches simultaneously.

In all types, the processor uses measurements to calculate the touch position and
initiate the requested action.

Inputting Graphics
Several methods exist for inputting graphic data:

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Webcam: Streams video images.

Digital Camera: Downloads stored images/videos.
Scanner: Creates a digital representation of an image by moving a light source
across the paper, directing the reflected light to a CCD (Charge-Coupled
Device).

A CCD consists of an array of photosensitive cells that produce an

electrical response proportional to light intensity; an analog-to-digital
converter is needed to create digital values.

Sound Input and Output

Voice input: Uses a microphone (condenser or piezoelectric) to convert sound
vibrations into electrical signals. An ADC (Analog-to-Digital Converter) converts
the analog signal to digital for computer processing.

Voice output: Uses a speaker (loudspeaker). A DAC (Digital-to-Analog Converter)

converts the digital data from the computer to an analog signal that drives the
speaker's coil, causing a diaphragm to vibrate and produce sound. An audio card
manages these processes. The same principles apply to music input and output.

Electrostatic Imaging Stages

Stage 1: Charging. The drum is initially charged with a uniform electrostatic
charge.
Stage 2: Exposure. The drum is exposed to light, which discharges areas
corresponding to the image.
Stage 3: Developing. Toner is applied, adhering to the charged areas.

Electrostatic Imaging Use Cases

Laser printing
Photocopying

Color vs. Black and White Printing

The procedure for color printing involves multiple passes, one for each color (typically
CMYK), while black and white printing only requires a single pass.

Touch Screen Technologies

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Surface Acoustic Wave (SAW) Touchscreen

This technology can be used with any type of computer screen. It uses acoustic
waves to detect touch.

Capacitive Touchscreen
This technology is only applicable for use with flat screens. It detects the change in
capacitance caused by a finger's touch.

Storage Devices

Primary and Secondary Storage Devices

Device Media Type

Hard Disk Magnetic Disk

DVD-RW Optical Disc
Flash Memory Solid-State (Flash Memory)

Internal Operation of Storage Devices

DVD-RW: Uses a laser to write and read data by burning pits onto the disc's surface.
Data is encoded based on the presence or absence of pits.

DVD-RAM: Similar to DVD-RW but uses phase-change technology to alter the

reflective properties of a specific area on the disc, allowing for both read and write
operations.

RAM vs. ROM

RAM (Random Access Memory): Volatile; data is lost when power is off.
ROM (Read-Only Memory): Non-volatile; data persists even when power is off.

DRAM vs. SRAM

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DRAM (Dynamic RAM): Uses capacitors to store data; requires frequent

refreshing; slower; cheaper.
SRAM (Static RAM): Uses flip-flops to store data; no refreshing required; faster;
more expensive.
DRAM and SRAM differ significantly in speed and cost due to their distinct
storage mechanisms.

Boolean Logic and Problem Statements

A logic assertion or logic proposition is a statement that can only have
one of two values: TRUE or FALSE. A problem statement combines logic
propositions using Boolean operators to produce an outcome.

Boolean Operators

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AND: A AND B is TRUE if both A and B are TRUE.

A AND B = TRUE only if A = TRUE and B = TRUE. Otherwise it

is FALSE.

OR: A OR B is TRUE if either A or B (or both) is TRUE.

A OR B = TRUE if A = TRUE or B = TRUE or both are TRUE.

Otherwise it is FALSE.

NOT: NOT A is TRUE if A is FALSE.

NOT A = TRUE if A = FALSE. Otherwise it is FALSE.

NAND: A NAND B is TRUE if either A or B is FALSE (or both).

A NAND B = TRUE if A = FALSE or B = FALSE or both are

FALSE. Otherwise it is FALSE.

NOR: A NOR B is TRUE if both A and B are FALSE.

A NOR B = TRUE only if A = FALSE and B = FALSE. Otherwise

it is FALSE.

XOR: A XOR B is TRUE if either A or B is TRUE, but not both.

A XOR B = TRUE if either A = TRUE or B = TRUE, but not

both. Otherwise it is FALSE.

Constructing Logic Expressions

A logic expression combines logic propositions using Boolean operators. For
example, a delivery (X) is ordered if it is the end of the month (A) or the reorder level
is reached (B) or a regular customer (C) orders a large amount (D):

X = A OR B OR (C AND D)

Truth Tables
Truth tables visually represent the outputs of logic expressions for all possible input
combinations. For example, the truth table for AND:

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A B X = A AND B

0 0 0
0 1 0
1 0 0
1 1 1

Logic Circuits and Logic Gates

Logic circuits use logic gates to perform Boolean operations. Each gate corresponds
to a specific Boolean operator (AND, OR, NOT, etc.). The symbols and truth tables for
these gates are standardized.

Logic Gates and Circuits

The NOT Gate
The NOT gate is a special case, having only one input.

NAND and NOR Gates

A NAND gate is a combination of an AND gate followed by a NOT gate.
A NOR gate is a combination of an OR gate followed by a NOT gate.
NAND and NOR gates produce a complementary output to the AND and OR
gates.

Constructing Logic Circuits

Worked Example 4.02: Constructing a logic circuit from a problem statement.

A bank offers a special lending rate based on customer criteria:

Account held for two years (A)
Married (B)
Aged 25+ (C)
Parents are bank customers (D)
Qualifying conditions: A AND (((B AND C) OR (B AND D)) OR (C AND D))
This can be represented as:
X = A AND (((B AND C) OR (B AND D)) OR (C AND D))

This circuit can be constructed using four AND gates and two OR gates. (See
Figure 4.03 in the textbook).

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Constructing Truth Tables

Worked Example 4.03: Constructing a truth table from a logic circuit.

Systematic approach: Identify intermediate points in the circuit and record

values at each point.
(See Figures 4.04 and 4.05, and Table 4.03 in the textbook for a detailed
example).
Checking the solution: Examine parts of the circuit to verify results (e.g., if input
C is 0, the output must be 0).

Converting Truth Tables to Logic Circuits

Use rows producing a '1' output to create logic expressions using AND and OR
operators.
Example: A truth table (Table 4.04 in the textbook) can be converted to the
following logic expression: ¬A ∧ ¬B ∧ C ∨ ¬A ∧ B ∧ C ∨ A ∧ ¬B ∧ ¬C

Logic Circuits

Signals from Oven Components

The following table summarizes the signals received from oven components:

Signal Value Component Condition

0 Fan not working

1 Fan working properly
0 Internal light not working
1 Internal light working properly
0 Thermometer reading too high
1 Thermometer reading in range

If the thermometer reading is in range (1), but either or both the fan and light are not
working (0), a warning light should activate. A logic circuit would need to be
designed to represent this fault condition.

Logic Scenarios and Expressions

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A logic scenario can be described using a problem statement or a logic expression.

A logic expression is made up of logic propositions and Boolean

operators.

Logic circuits are built from logic gates.

The operation of a logic gate mirrors that of a Boolean operator.

The outcome of a logic expression or circuit can be shown in a truth table. A logic
expression can be derived from a truth table using the rows that result in a 1 output.

Exam-Style Questions
Several exam-style questions are provided, covering topics such as:

Identifying logic gates and sketching truth tables.

Analyzing logic circuits for redundancy.
Creating truth tables for NAND gates.
Expressing competition results as logic expressions and circuits.
Designing logic circuits for domestic heating systems based on various fault
conditions and sensor inputs.
Writing logic statements to describe logic circuits.

Von Neumann Model

John von Neumann first described the basic principles of computer system
architecture. The model includes:

A processor (CPU).
Direct processor access to memory.
Memory containing a stored program (replaceable) and data.
A stored program made of individual instructions.
Sequential instruction execution by the processor.

CPU Architecture
To understand the Von Neumann model's practical application, we need to know the
CPU's hardware components and their functions. A simplified schematic shows a
processor with the minimum necessary components.

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The active components are the Arithmetic Logic Unit (ALU) and the
control unit. The ALU handles arithmetic and logic processing. The control
unit manages data flow throughout the system, ensures correct
instruction handling, and uses clocks for synchronization (internal and
system clocks). Clock speed, defined by frequency, determines the
minimum time between successive activities.

The CPU also contains registers:

Registers are storage components near the ALU, enabling fast access.
They have limited storage capacity (e.g., 16, 32, or 64 bits) and are either
general-purpose or special-purpose. A single general-purpose register is
called an Accumulator.

Lecture Notes: CPU Architecture and

System Bus
Accumulator and Special-Purpose Registers
The Accumulator is a register that stores a single value used by the Arithmetic Logic
Unit (ALU) for instruction execution. After execution, the ALU can store a different
value in the Accumulator.

The Accumulator acts as a temporary storage location for data being

processed by the ALU.

Other special-purpose registers include:

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Current Instruction Register (CIR): Stores the current instruction being

decoded and executed.
Index Register (IX): Stores a value used for indexed addressing. Sometimes
abbreviated as IR, but this can be confused with CIR. In these notes, IX will
always refer to the Index Register, and CIR to the Current Instruction Register.
Memory Address Register (MAR): Stores the address of a memory location
about to be read from or written to.
Memory Data Register (MDR) / Memory Buffer Register (MBR): Stores data
read from or about to be written to memory. Acts as a buffer because internal
processor transfers are much faster than external ones.
Program Counter (PC): Stores the address of the next instruction to be fetched.
(Note: In this book, PC will only be used in register transfer notation.)
Status Register (SR): Contains bits (flags) that are set or cleared to indicate
conditions like carry, negative, or overflow.
Register Name Abbreviation Function

Current Instruction Stores the current instruction during decoding

CIR
Reg and execution
Index Register IX Stores a value used for indexed addressing
Memory Address Stores the address of a memory location to be
MAR
Register read from or written to
Memory Data Stores data read from or about to be written to
MDR (MBR)
Register memory
Program Counter PC Stores the address of the next instruction
Contains flags indicating various conditions
Status Register SR
(carry, negative, overflow)

The System Bus

A bus is a parallel transmission component; each wire carries a single bit. It's crucial
to understand that a bus is not a storage device; it transfers data between
components. The system bus connects the CPU, memory, and I/O system. In this
simple computer system, the bus has three components:

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Address Bus: Carries addresses from the MAR to memory or I/O controllers
(one-way).
Data Bus: Carries data (instructions, addresses, values) between the CPU,
memory, and I/O devices (two-way). The direction of data flow (CPU to
memory, memory to CPU, I/O to CPU/memory) can vary depending on the
computer system's architecture.
Control Bus: Transmits signals between the control unit and other components
(two-way). Typically has eight wires and carries timing signals synchronized by
the system clock to coordinate data transmission.

Factors Affecting System Performance

Processor clock speed is a major factor, as one clock cycle defines the minimum time
for any action. Components outside the processor (Immediate Access Store or IAS)
are much slower. To address this, modern processors are more complex (e.g., multi-
core CPUs).

Other performance factors include:

Cache Memory: Faster than main memory, improves performance with

increased size and access speed. On-chip cache is the fastest.
Word Length: Defines the number of bytes/bits the system handles as a unit
(e.g., 16, 32, or 64 bits). Influences register size and bus widths.
Bus Width: The number of bits in the address bus defines the number of
directly addressable memory locations (e.g., a 16-bit address bus allows
65,536 locations). Special techniques are needed for larger memories. Data bus
width affects data transfer rates.

Data Bus Width and Word Length

Ideally, the data bus width should equal the word length. If this isn't feasible, the
bus width can be half the word length, requiring two transfers for a full word. This
impacts system performance.

Laptop Computer Specifications

Extension Question 5.01: An advertisement lists a laptop as "4 GB, 1 TB, 1.7 GHz".

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(a) This refers to:

RAM (4 GB)
Hard drive (1 TB)
Processor speed (1.7 GHz)
(b) Calculating minimum time between successive activities requires knowing
the clock cycle time (1/frequency). The minimum time is 1 / 1.7 GHz = 0.588 ns.

I/O Ports and the USB Standard

Each I/O device connects to an interface called a port, managed by an I/O controller.
Ports are either internal (integral to the system) or external (for peripherals).

The Universal Serial Bus (USB) revolutionized peripheral connection, enabling the
plug-and-play concept. It supports a hierarchy of up to 127 devices, allowing hot-
swapping and automatic configuration. USB 3.2 is the latest version.

USB is a bus. A USB drive stores data; its USB port enables data
transmission.

Discussion Point: Research storage devices connected via USB, noting the USB
technology and data transfer speeds. Compare these to internal hard drive access
speeds.

Specialized Multimedia Ports

While USB is versatile, some devices need specialized ports.

VGA: Provides high-resolution display but lacks audio.

HDMI: Supports high-quality video and audio.

The Fetch-Execute (FE) Cycle

The fetch-decode-execute cycle is illustrated in a flowchart (Figure 5.03, not
included here as it was not in the provided text).

Assuming a running program, the program counter (PC) holds the next instruction's
address.

Fetch Stage:

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1. The PC address is transferred to the memory address register (MAR).

2. Simultaneously:
The instruction at the MAR address is fetched into the memory data
register (MDR).
The PC is incremented.
3. The MDR instruction is transferred to the control instruction register (CIR).

The system clock controls the cycle, allowing one memory transfer per
cycle. The PC increment is by 1, unless it's a jump instruction, which
updates the PC after decoding.

Decode Stage: The control unit decodes the CIR instruction, sending signals to
appropriate components for execution.

Execute Stage: (Detailed in Chapter 6).

Register Transfer Notation

This notation describes register operations. For example, the fetch stage:

; ; ;
M AR ← [P C] P C ← [P C] + 1 M DR ← [[M AR]] CI R ← [M DR]

The arrow (←) shows data transfer. Square brackets [] indicate register
contents. Double brackets [[]] denote the content at a given address.
Semicolons separate simultaneous operations.

Interrupt Handling
Interrupts are triggered by various events:

Program errors
Hardware faults
I/O requests
User interaction
Timer signals

Discussion Point: Research different interrupt causes.

Interrupts are handled according to priority. An interrupt register (similar to a status

register) tracks interrupt types. Interrupts are detected after an FE cycle.

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Interrupt handling steps:

1. Save PC and other registers.

2. Load the Interrupt Service Routine (ISR) start address into the PC.
3. Execute the ISR.
4. Check for further interrupts (repeat steps 2-3 if needed).
5. Restore registers and resume the original program.

Reflection Point: Consider strategies for remembering special purpose

register names and abbreviations.

Von Neumann Architecture

The von Neumann architecture is based on the stored program concept. The CPU
contains... (The transcript cuts off here).

Computer Architecture Study Guide:

Processor Components and Instruction
Handling
Processor Components
Control Unit: Directs the operation of the processor.
Arithmetic and Logic Unit (ALU): Performs arithmetic and logical operations.
Registers: High-speed storage locations within the CPU.
Special-purpose registers: Have dedicated functions (e.g., Memory
Address Register (MAR), Current Instruction Register (CIR)).
General-purpose registers: Can be used for various purposes.
Status register: Contains individual bits (flags) indicating the status of
operations (e.g., zero flag, carry flag).
System Bus: A set of pathways connecting different components of the CPU. It
consists of:
Data bus: Transfers data.
Address bus: Specifies memory locations.
Control bus: Controls data flow and timing.
Universal Serial Bus (USB) Port: Used to connect external devices.

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Instruction Handling
Fetch-execute cycle: The process by which the CPU retrieves and executes
instructions.
Register Transfer Notation: A shorthand way of describing data transfers
between registers and memory. For example: MAR ← [PC] means "the contents
of the Program Counter (PC) are copied to the Memory Address Register
(MAR)".
Interrupts: Signals that halt the normal execution of the program to handle
exceptional events. When an interrupt is detected, control is transferred to an
interrupt-handling routine.

Exam-Style Questions & Answers

1. Processor with One General-Purpose Register:

a. The name of the single general-purpose register is typically the

Accumulator.

b. Memory Address Register (MAR):

i. Function: Holds the address of the memory location to be accessed.

ii. Data type: Memory address.
iii. Supplying register: Program Counter (PC) during the fetch stage.

c. Current Instruction Register (CIR):

i. Function: Holds the instruction currently being executed.

ii. Data type: Instruction code.
iii. Supplying register: Memory Data Register (MDR) at the end of the
fetch stage.

d. Three Differences Between MAR and MDR:

Feature MAR MDR

Function Holds memory address Holds memory data

Data Type Address Data
Interaction with Address bus Data bus

2. The System Bus:

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a. Bus Explanations:

Data Bus: Transfers data between the CPU, memory, and I/O devices.
Address Bus: Specifies the memory location or I/O device being accessed.
Control Bus: Coordinates the actions of all components; signals for
read/write, interrupts etc.

b. Bus Width:

i. Determined by the number of bits that can be transferred

simultaneously.
ii. The control bus will typically have the least width.
iii. Changing the address bus from 32-bit to 64-bit increases the
maximum addressable memory by a factor of 2 . 32

3. Fetch Stage in Register Transfer Notation:

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a. Explanation of Statements:

MAR ← [PC]: The contents of the PC (holding the address of the next
instruction) are copied to the MAR.
PC ← [PC] + 1: The PC is incremented to point to the next instruction.
MDR ← [[MAR]]: The contents of the memory location addressed by the
MAR are fetched and placed in the MDR.
CIR ← [MDR]: The instruction from the MDR is loaded into the CIR for
decoding and execution.

Definitions:

MAR (Memory Address Register): Holds the address of the

memory location being accessed.
PC (Program Counter): Holds the address of the next
instruction to be fetched.
[ ]: Denotes "contents of".
←: Denotes "is assigned the value of".
MDR (Memory Data Register): Temporarily holds data read
from or written to memory.
[[ ]]: Denotes "contents of the memory location whose
address is".
CIR (Current Instruction Register): Holds the instruction
currently being executed.

b. Bus Usage:

MAR ← [PC]: The address on the address bus is the contents of the PC,
sent to the memory.
MDR ← [[MAR]]: The data from memory is transferred on the data bus into
the MDR.

4. Von Neumann Model Buses:

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a. Three buses used in the von Neumann model:

Data Bus: Transfers data between components.

Address Bus: Specifies the memory location or I/O device being accessed.
Control Bus: Coordinates and controls data flow between components.

b. Sequence of operations:

i. Step 2: The Program Counter (PC) is incremented to point to the next

instruction.
ii. Step 3: The contents of the memory location addressed by the MAR are
loaded into the MDR.
iii. Step 4: The instruction from the MDR is loaded into the CIR.

c. Execution of Instruction LDD 35: This would load the data at memory location
35 into the accumulator.

d. Interrupts:

i. An interrupt is a signal indicating an event requiring immediate

attention.
ii. When an interrupt is detected:
The processor saves the current state (registers).
The processor jumps to the interrupt service routine (ISR) address.
The ISR is executed.
The processor restores the saved state and continues execution.

5. Special-Purpose Registers in Fetch Stage:

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a. Special-purpose registers in the fetch stage:

PC: Holds the address of the next instruction.

MAR: Holds the address of the instruction being fetched.
MDR: Holds the instruction fetched from memory.
CIR: Holds the instruction that is being decoded and executed.

b. Handling an Interrupt:

B: The processor checks for an interrupt.

If the interrupt flag is set:
D: The register contents are saved.
A: The address of the Interrupt Service Routine (ISR) is loaded to the
Program Counter (PC).
C: When the ISR completes, the processor restores the register contents.
The interrupted program resumes.

Assembly Language Programming 汇编语言编程

6.01 Machine Code Instructions:

The CPU only understands machine code, a sequence of instructions with an

opcode (operation code) and optionally operands. Different processors have
different instruction sets.

For a given processor, each machine code instruction must specify:

Total number of bits/bytes.

Number of bits for the opcode.
Number of operands.
Opcode position (most or least significant bits).

A 16-bit address bus system with one general-purpose register (accumulator)

is described. Instruction format: 8-bit opcode (4 bits operation, 2 bits address
mode, 2 bits for registers) and a 16-bit operand (memory address). Opcode
transfer: CU ← [CIR(23:16)].

6.02 Assembly Language:

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Assembly language provides a more human-readable alternative to machine

code, using mnemonics for opcodes and character representations for
operands. An assembler translates assembly language into machine code.
Assembly language allows for:
Comments
Symbolic names for constants
Labels for addresses
Macros (reusable instruction sequences)
Directives (instructions for the assembler)

6.03 Symbolic, Relative, and Absolute Addressing:

This section discusses the differences between symbolic, relative, and absolute
addressing used by assemblers to convert assembly language into machine
code. The details of these addressing modes are not provided in the transcript.

Assembly Language Programming

Instruction Explanation and Symbolic
Addressing
A single number is input at the keyboard, and its ASCII code is stored in the
accumulator.

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SUB #48: This subtracts 48 from the accumulator's contents. This converts the
ASCII code to its binary equivalent.
STO MAX: The value in the accumulator is stored at the memory location labeled
MAX.
LDM #0: Loads the value 0 into the accumulator.
STO TOTAL: Stores the value in the accumulator (0) at the memory location
labeled TOTAL.
STO COUNT: Stores the value in the accumulator (0) at the memory location
labeled COUNT.
STRTLP: IN: Inputs a number from the keyboard (ASCII code to accumulator).
SUB #48: Converts the ASCII code to binary.
ADD TOTAL: Adds the value at TOTAL to the accumulator; the sum is stored in the
accumulator.
STO TOTAL: Stores the updated sum back into TOTAL.
LDD COUNT: Loads the value from COUNT into the accumulator.
INC ACC: Increments the accumulator's value by 1.
CMP MAX: Compares the accumulator's value with the value at MAX.
JPN STRTLP: If the values are unequal, the program jumps to the instruction
labeled STRTLP.
END: Program termination.

Symbolic Addressing: Using labels (like MAX, TOTAL, COUNT, STRTLP) to refer
to memory locations instead of their numerical addresses. This improves
code readability and maintainability.

Alternative Addressing Modes

The example program can also use relative or absolute addressing instead of
symbolic addressing.

Relative Addressing: Uses an offset from a base register (BR) to locate memory
addresses. No labels are used.

Absolute Addressing: Specifies the exact memory address for each instruction and
data. Again, no labels are used.

Base Register (BR): A special register holding a base address used for
calculating memory addresses in relative addressing.

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Two-Pass Assembler
A two-pass assembler is necessary to handle programs with forward references
(using labels before they are defined).

Pass 1: Creates a symbol table, recording labels and their corresponding memory
addresses.

Pass 2: Uses the symbol table and an opcode lookup table (mapping opcodes to
binary representations) to translate the assembly code into machine code.

Symbol Offset

MAX +15
TOTAL +16
COUNT +17
STRTLP +7

Symbol Table: A table that stores labels and their corresponding memory
addresses within the program. This helps resolve forward references.

Opcode Lookup Table: A table containing the binary representation of

each assembly language instruction (opcode).

Opcode Mnemonic Opcode Binary

IN 0001 0000
SUB 0110 0001
STO 0100 0100
LDM 0010 0001
ADD 0100 0101
LDD 0010 0101
INC 0101 0101
CMP 1000 0100
JPN 1010 0100
END 1111 1111

Forward Reference: A label used in an instruction before it is defined in

the assembly code.

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Addressing Modes
Different ways of specifying the location of an operand (data) for an instruction:

Addressing Mode: The method used to specify the location of an operand

in an instruction. Different modes offer different ways to access data.

Addressing Modes
Four different addressing modes can be defined in a machine code instruction:

Addressing
Description Example
Mode

Immediate The operand is the value to be used in the instruction. SUB #48
The operand is the address which holds the value to be
Direct ADD TOTAL
used in the instruction.
The operand is an address that holds the address which
Indirect
has the value to be used in the instruction.
The operand is an address to which must be added the
Indexed
value currently in the index register (IX).

For immediate addressing, there are three options for defining the value:

#48 specifies the denary value 48

#B00110000 specifies the binary equivalent
#&30 specifies the hexadecimal equivalent

Assembly Language Instructions

A simple processor with a limited instruction set is considered. Examples are
representative of common instruction categories.

Data Movement
These instructions load data into a register or store data in memory.

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Opcode
Instruction Explanation
Operand

LDM #n Immediate addressing. Load the number n to ACC.

LDR #n Immediate addressing. Load the number n to IX.
LDD Direct addressing. Load the contents at the given address
<address> to ACC.
Indirect addressing. The address to be used is at the
LDI
given address. Load the contents of this second address
<address>
to ACC.
Indexed addressing. Form the address from
LDX
+ the contents of the index register. Copy the contents of
<address>
this calculated address to ACC.
MOV Move the contents of the accumulator to the given
<register> register (IX).
STO
Store the contents of ACC at the given address.
<address>

The mnemonic defines the instruction type, including the register involved
and, where appropriate, the addressing mode. ACC indicates the
accumulator.

Input and Output

IN:Stores the ASCII value of a keyboard character in the ACC.
OUT: Displays the character whose ASCII code is in the ACC.

Comparisons and Jumps

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Opcode
Instruction Explanation
Operand

JMP
Jump to the given address.
<address>
CMP Compare the contents of ACC with the contents of
<address> .
CMP #n Compare the contents of ACC with the number n.
CMI Indirect addressing. Compare the contents of ACC with
<address> the contents at the address specified at the given address.
JPE Following a compare instruction, jump to
<address> if the compare was True.
JPN Following a compare instruction, jump to
<address> if the compare was False.

The comparison checks for equality. The result is recorded in a status

register flag. Conditional jumps check this flag.

Arithmetic Operations
Opcode
Instruction Explanation
Operand

ADD <address> Add the contents of the given address to the ACC.
ADD #n Add the denary number n to the ACC.
Subtract the contents of the given address from the
SUB <address>
ACC.
SUB #n Subtract the denary number n from the ACC.
INC
Add 1 to the contents of the register (ACC or IX).
<register>
DEC Subtract 1 from the contents of the register (ACC or
<register> IX).

Shift Operations
LSL #n: Logically shifts bits in the accumulator n places to the left.
LSR #n: Logically shifts bits in the accumulator n places to the right.

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In a logical shift, no consideration is given to the binary code's

representation. The operation moves a bit to the carry bit in the status
register. A left shift (with a leading zero) is a fast way to multiply by two
for unsigned integers; a right shift is a fast way to divide by two. However,
these are not always accurate for signed integers.

Shift Instructions ️
More complex processors may offer a cyclic shift, where a bit moves from one end to
the carry bit and then re-enters at the other end, preserving all original bit values.
Left and right arithmetic shifts are also common, similar to logical shifts but
designed for multiplying or dividing signed integers by two. The sign bit remains
unchanged after the shift.

Bitwise Logic Operations

These operations use a mask (operand) to affect specific bits. Table 6.10 details the
instructions:

Instruction Explanation

AND #Bn Bitwise AND of ACC and binary number n

AND <address> Bitwise AND of ACC and memory contents at
XOR #Bn Bitwise XOR of ACC and binary number n
XOR <address> Bitwise XOR of ACC and memory contents at
OR #Bn Bitwise OR of ACC and binary number n
OR <address> Bitwise OR of ACC and memory contents at

Register Transfer Notation

This notation describes instruction execution. For example, the LDD instruction is:

ACC\larr[[CI R(15 : 0)]]

The instruction is in the CIR, and only the 16-bit address is needed to locate the data
in memory, which is then transferred to the accumulator.

Computer Arithmetic and the Status Register

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Computer arithmetic can produce incorrect results due to overflow. The Status
Register helps identify such issues.

The Status Register uses flags (C, N, V) to indicate conditions such as

carry, negative result, and overflow.

Worked Example 6.01:

1. Adding two positive numbers resulting in a negative number (e.g., 66 + 68

using 8-bit representation) indicates overflow. The negative flag (N) and
overflow flag (V) are set to 1, causing a processor interrupt.
2. Adding two negative numbers resulting in a positive number shows overflow.
The negative flag (N) is not set, but both overflow (V) and carry (C) flags are
set to 1, again triggering an interrupt.

Tracing Assembly Language Programs

Dry runs help identify errors in assembly language programs. Trace tables track the
accumulator's contents during program execution.

Worked Example 6.02: A trace table is used, showing changes in the accumulator
and memory locations based on user inputs (15, 27, 31).

Worked Example 6.03: This example demonstrates tracing a program containing a

jump instruction, requiring tracking both the program counter and accumulator
values. The trace table shows the changes in program execution, including the effects
of the jump instruction. Note that changes to memory locations 100-107 are not
allowed during the program’s execution.

Assembly Language and Machine Code

Machine Code Instructions
A machine code instruction consists of an opcode and an operand.

Assembly Language Programs

An assembly language program contains assembly language instructions plus
directives that provide information to the assembler.
A two-pass assembler identifies relative addresses for symbolic addresses in
the first pass.

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Processor Addressing Modes

Immediate: The operand is the value itself.
Direct: The operand is the memory address.
Indirect: The operand is the memory address of the address containing the
value.
Indexed: The operand is a base address plus an index register value.

Assembly Language Instruction Categories

Data movement: Moving data between registers and memory.
Input/output: Handling input and output operations.
Compare and jump: Comparing values and branching based on the result.
Arithmetic: Performing arithmetic operations.
Shift and logical: Performing bitwise operations.

Exam-Style Questions

Question 1: Addressing Modes

This question explores different processor addressing modes (direct, indirect,
indexed) using the instructions LDD, LDI, and LDX. It requires drawing diagrams to
illustrate instruction execution and determining the accumulator's content after each
instruction. The diagrams would show memory addresses, contents, register values,
and arrows depicting data flow during instruction execution.

Question 2: Assembly Language Program Components

(a) Describes three types of components in an assembly language program that
aren't directly translated into machine code (e.g., directives like .data, .text, or
.global; macros; comments).

(b) Completes a trace table for a given assembly language program, showing the
memory contents and accumulator value at each step. The program uses instructions
like LDD, INC, STO, LDI (indirect addressing), DEC, ADD, and END.

Question 3: Assembly Language Program Analysis

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This question analyzes a simple assembly language program that takes input,
performs a calculation, and outputs a result. It requires explaining the program's
input, output, and completing a symbol table generated by the first pass of a two-
pass assembler.

Question 4: Assembly Language Instructions and Memory

This question involves a processor with an accumulator (ACC) and an index register
(IX). It presents a table of assembly instructions (LDD, LDX, STO, ADD, INC, DEC, CMP, JPE,
JPN, JMP, OUT, END) and asks to:

(a) Determine the accumulator's contents after executing LDX 60, given memory
contents and the index register value. This tests understanding of indexed
addressing.

(b) Determine the index register's contents after executing DEC IX. This tests
understanding of the DEC instruction.

Monitoring and Control Systems

Monitoring Systems
A monitoring system records the condition of a system over time, often to
detect when a property goes outside a desired range (e.g., CPU
temperature). Sensors, like thermocouples (measuring temperature via
voltage output), are used to collect data. Sensors lack built-in intelligence;
they only measure and transmit data. The computer interprets this data
and takes action. Many types of sensors exist, measuring various
properties (pressure, humidity, etc.)

Control Systems

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A control system adds control capabilities to monitoring. It uses an

actuator (e.g., electric motor) to respond to measurements. An analog-to-
digital converter (ADC) converts sensor data to digital, and a digital-to-
analog converter (DAC) converts computer commands to analog for the
actuator. Feedback—the next measurement after a control action—is
essential. A closed-loop feedback control system directly uses feedback
to control operation. A microprocessor compares the actual output (from
sensor) with desired output and adjusts accordingly.

Closed-Loop Feedback Control Systems

A closed-loop feedback control system uses the difference between a
desired value and a measured value to adjust the system's output. This
creates a continuous feedback loop to maintain the desired state.

An example of where you might find one is in a system that regulates

temperature. A thermostat measures the current temperature and
compares it to the desired temperature. If there's a difference, it activates
the heating or cooling system accordingly.

Bit Manipulation for Device Control

A real-time program running on a computer or microprocessor continuously monitors
sensor data and sets Boolean variables based on this data. For example:

If SensorDifference1 > 0, then Sensor1HighFlag is set to TRUE.

If SensorDifference1 < 0, then Sensor1LowFlag is set to TRUE.
Similar conditions apply for SensorDifference2, setting Sensor2HighFlag and
Sensor2LowFlag.

These flags can be represented by individual bits within a byte in machine code. The
following assembly language code snippets illustrate how to manipulate these bits:

Setting all bits to zero:

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LDD 0034 ; Loads a byte into the accumulator from an address.

AND #B00000000 ; Uses a bitwise AND operation to convert each bit to 0.
STO 0034 ; Stores the altered byte in the original address.

Toggling a bit:

LDD 0034 ; Loads a byte into the accumulator from an address.

XOR #B00000001 ; Uses a bitwise XOR operation to toggle the value of bit 0
STO 0034 ; Stores the altered byte in the original address.

Setting a bit to 1:

LDD 0034 ; Loads a byte into the accumulator from an address.

OR #B00000100 ; Uses a bitwise OR operation to set bit 2 to 1.
STO 0034 ; Stores the altered byte in the original address.

Setting all bits to zero except one:

LDD 0034 ; Loads a byte into the accumulator from an address.

AND #B0000010 ; Uses a bitwise AND operation to leave bit 1 unchanged, ot
STO 0034 ; Stores the altered byte in the original address.

Bitwise logic operations act on each bit individually; all bits in the
accumulator are processed simultaneously.

Monitoring and Control Systems

Sensors: Measure physical quantities (temperature, humidity, pH, etc.).
Actuators: Respond to signals from the program to control the environment.

A monitoring and control program runs in a continuous loop:

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1. It reads sensor data at timed intervals.

2. It transmits signals to actuators based on the sensor data if control is needed.

Bit manipulation within the program allows precise control of devices.

Exam-Style Question
A farmer uses a barn to house poultry. The barn environment affects egg-laying.
Traditionally, the farmer manually checked the barn's conditions and made
adjustments if necessary. More recently, the farmer has considered using a
monitoring and control system to automatically maintain optimal conditions.

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