Unit VI
Unit VI
Every time a key is depressed, the terminal sends a binary coded character to the computer. There are
different types of video monitors, but the most popular use a cathode ray tube(CRT). The CRT contains an
electronic gun that sends an electronic beam to a phosphorescent screen in front of the tube. The beam can be
deflected horizontally and vertically. To produce a pattern on the screen, a grid inside the CRT receives a
variable voltage that causes the beam to hit the screen and make it glow at selected spots. A characteristic
feature of display devices is a cursor that marks the position in the screen where the next character will be
inserted. The cursor can be moved to any position in the screen, to a single character, the beginning of a
word,or to any line.
Printers provide a permanent record on paper of computer output data or text. There are three basic
types of character printers. The daisywheel printer contains a wheel with the characters placed along the
circumference. To print a character, the wheel rotates to the proper position and an energized magnet then
presses the letter against the ribbon.
The dot matrix contains a set of dots along the printer mechanism. For example, a 5 X 7 dot matrix
printer that prints 80 characters per line has seven horizontal lines, each consisting of 5 x 80 = 400 dots. Each
dot can be printed or not, depending on the specific characters that are printed on the line. The laser printer
uses a rotating photographic drum that is used to imprint the character images. The pattern is then transferred
onto paper in same manner as a copying machine.
Disks are used mostly for bulk storage of programs and data. magnetic disks have high speed rotational
surfaces coated with magnetic material. Other input and output devices encountered in computer systems are
digital incremental plotter, optical and magnetic character readers, analog to digital converters, and various
data acquisition equipment.
Input and output devices that communicate with people and the computer are usually involved in the
transfer of alphanumeric information to and from the device and the computer.
See the UNIT II for ASCII alphanumeric characters Table
To resolve these differences, computer systems include special hardware components between the CPU and
peripherals to supervise and synchronize all input and output transfers. These components are called interface
units because they interface between the processor bus and the peripheral device.
In addition, each device may have its own controller that supervises the operations of the particular mechanism
in the peripheral.
Processor DATA
Address
Control
There are four types of commands that an interface may receive. They are classified as control, status, data
output and data input.
A control command is issued to activate the peripheral and to inform it what to do. The particular
control command issued depends on the peripheral, and each peripheral receives its own distinguished
sequence of control commands, depending on its mode of operation.
A status command is used to test various status conditions in the interface and the peripheral. For
example, the computer may wish to check the status of the peripheral before a transfer is initiated. During the
transfer, one or more errors may occur which are detected by the interface. These errors are designated by
setting bits in a status register that the processor can read at certain intervals.
Once a data transfer is initiated, the CPU is required to monitor the interface to see when a transfer can
again be made. It is up to the programmed instructions executed in the CPU to keep close tabs on everything
that is taking place in the interface unit and the I/O device. In the programmed IO method, the CPU stays in a
program loop until the IO unit indicates that it is ready for data transfer. This is a time consuming process since
it keeps the processor busy needlessly.
Interface
Data bus I/O bus
Address bus
CPU Data register Data valid I/O
device
I/O read
Status register F Data accepted
I/O write
The device transfers bytes of data one at a time as they are available. When a byte of data is available,
the device places it in the I/O bus and enables its data valid line. The interface accepts the byte into its data
register and enables the data accepted line. the interface sets a bit in the status register that we will refer to as
an F or “flag” bit. The device can now disable the data valid line, but it will not transfer another byte until data
accepted line is disabled by the interface.
A program is written for the computer to check the flag in the status register to determine if a byte has
been placed in the data register by the I/O device. This is done by reading the status register into a CPU register
and checking the value of the flag bit. If the flag is equal to 1, the CPU reads the data from the data register. The
flag bit is then cleared to 0 by either the CPU or the interface, depending on how the interface circuits are
I/O Organization and System S/w & Programming Techniques Page 3
designed. One the flag is cleared, the interface disables the data accepted line and the device can then transfer
the next data byte.
Each byte is read into a CPU register and then transferred to memory with a store instruction. A
common IO programming task is to transfer a block of words from an I/O device and store them in a memory
buffer. The programmed I/O method is particularly useful in small low speed computers.
I/O I/O
System bus
I/O bus
3)--I/O Bus--
During DMA transfer, the CPU is idle and has no control of the memory buses. A DMA controller takes over the
buses to manage the transfer directly between the I/O device and memory. The CPU may be placed in an idle
state in a variety of ways. One common method extensively used in microprocessors is to disable the buses
through special control signals.
RD Read
BG WR Write
Bus grant
The figure shows two control signals in the CPU that facilitate the DMA transfer. The bus request (BR)
input is used by the DMA controller to request the CPU to release control of the buses. When this input is
active, the CPU terminates the execution of the current instruction and places the address bus, the data bus,
and the read and write lines into a high-impedance state. The high-impedance state behaves like an open
circuit, which means that the output is disconnected and does not have a logic significance.
The CPU activates the bus grant (BG) output to inform the external DMA that the buses are in the high
impedance state. The DMA that originated the bus request can now take control of the buses to conduct
memory transfers without processor intervention. When the DMA terminates the transfer it disables the bus
request line.
The CPU disables the bus grant, takes control of the buses, and returns to its normal operation. When
the DMA takes control of the bus system, a communicates directly with the memory. An alternative technique
called cycle stealing allows the DMA controller to transfer one data word at a time, after which a must return
control of the buses to the CPU. The CPU merely delays its operation for one memory cycle to allow the direct
memory I/O transfer to “steal” one memory cycle.
When the transfer is complete, the DMA module sends an interrupt signal to the processor. Thus, the
processor is involved only at the beginning and end of the transfer.
Data count
Address register
Address lines
DMA request
Control logic
DMA ack
Interrupt
Read
Write
When the processor wishes to read or write a block of data, it issues a command to the DMA module,
by sending to the DMA module the following information:
Whether a read or write is requested, using the read or write control line between the processor and
the DMA module.
Address of the I/O device involved, communicated on the data lines
The starting location in memory to read from or write to, communicated on the data lines
The starting location in memory to read from or write to, communicated on the data lines and stored by
the DMA module in its address register.
The number of words to be read or written, again communicated via the data lines and stored in the
stored count register.
The processor then continuous with other work.
– CPU can waste vast amounts of processing cycles waiting for these slow devices to perform their tasks
Interrupts let the CPU execute its normal instruction sequence and pause to service the external devices
only when they signal (the interrupts) that they are ready for the CPU’s attention. The processor and the O/S are
responsible for recognizing an interrupt, suspending the user program, servicing the interrupt, and then
resuming the user program
Interrupts are processed in an interrupt cycle within the overall instruction cycle
– At the end of an instruction cycle (operand storage step), check to see if any interrupts are pending
– If there aren’t any, proceed with the next instruction
– If there are
» Suspend execution of the program and save its “state”
» Jump to the interrupt service routine(ISR) and resume the “normal” instruction cycle
» When the ISR is completed, restore the state of the program and resume its operation
Multiple Interrupts
– A typical system can support several to several dozen interrupts
– How should the system respond if more than 1 interrupt occurs at the same time?
» Systems prioritize the various interrupts
» At the start of the interrupt cycle, the highest priority pending interrupt will be serviced
» Remaining interrupt requests will be serviced in turn
– What if an interrupt occurs while an ISR is being executed (a result of a previous interrupt)
» Ignore the second interrupt (by disabling interrupts) until the ISR completes -- e.g., MC68HC11
microcontroller
» Recognize and service the interrupt only if it has a higher priority than the one currently being
serviced -- e.g., 8085
The processor in the IBM 370 computer is called a channel. A typical computer system configuration
includes a number of channels with each channel attached to one or more I/O devices. there are three types of
channels:
Multiplexer, selector, block multiplexer
Multiplexer channel: it can be connected to a number of slow and medium speed devices and is capable of
operating with a number of I/O devices simultaneously.
Block multiplexer channel: it combines the features of both the multiplexer and selector channels. It provides a
connection to a number of high speed devices, but all I/O transfers are conducted with an entire block of data.
The CPU communicates directly with the channels through dedicated control lines and indirectly
through reserved storage areas in memory.
Data can be transmitted between two points in three different modes: Simples, half-duplex, or full duplex.
A simplex line carries information in one direction only. The receiver cannot communicate with the transmitter
to indicate the occurrence or errors. Examples of simplex transmission are radio and television broadcasting.
A half duplex transmission system is one that is capable of transmitting in both directions but data can be
transmitted in only one direction at a time. The time required to switch a half-duplex line from one direction to
the other is called the turnaround time.
A full duplex transmission can send and receive data in both directions simultaneously. This can be achieved by
means of a four wire link, with a different pair of wires dedicated to each direction of transmission.
The communication lines, modems, and other equipment used in the transmission of information
between two or more stations is called a data link.
A data link control protocol is a set of rules that are followed by interconnecting computers and terminals to
ensure the orderly transfer of information. The purpose of a data link protocol is to establish and terminate a
connection between two stations, to identify the sender and receiver, to ensure that all messages are passed
correctly without errors, and to handle all control functions involved in a sequence of data transfers.
2504 2504 6B
Stack pointer
2505 24 Stack pointer
2505
2506 8D 2506
8D 2504
2506
98 98
2507 2507
6B 6B
2508
2508
35 Stack top 35 Stack top
2509 2509
2504 76 2504
The stack positions before and after POP operation are shown in Figures. Stack access is faster than memory
access.
SUBROUNTINES:
Often, we need to execute several times a sequence of instructions to perform a subtask within a program. In
such cases, we write the sequence of instructions which perform subtask as a separate subprogram. This
subprogram can be called at any point in the main program whenever required using a special instruction (CALL)
for this purpose. Such subprograms are known as subroutines or procedures. On the completion of the
subroutine, the execution of the main program from the next instruction after the CALL instruction in the main
program. Before starting the execution of a subroutine the content of the program counter, PC is saved on the
stack. The contents of PC point to the instruction following the CALL instruction(ie., instruction next to the CALL
instruction in the main program).
Machine Language:
A computer understands information composed of only zeros and ones and hence, it uses binary digits for its
operation. The computers instruction are coded and stored in the memory in the form of 0s and 1s. A program
written in the form of 0s and 1s called machine language program. There is a specific binary code for each
instruction. For example, to add the contents of register A and register B, the binary code is 10000000 for Intel
8085. Each microprocessor has its own instruction set and corresponding machine codes.
Assembly Language:
The writing of programs in machine language is very difficult, tiresome and boring job for a programmer. To
solve this problem and to facilitate programmer easily understandable languages have been developed.
Assembly language is one of them. Programs can easily be written in alphanumeric symbols instead of 0s and 1s.
For example, ADD for addition, SUB for subtraction, CMP for comparison,. Etc., such symbols are known as
mnemonics. A program written in mnemonics is called assembly language program.
Assembler: a program which translates an assembly language program into a machine language program is
called an assembler.
Advantages: the computation time for an assembly language program is less. An assembly language program
runs faster to produce the desired result..
Disadvantage: programming is difficult and time consuming, machine oriented ie., programmer must have the
detailed knowledge of registers and instruction set of the computer, connections of ports to the peripherals
etc., program is not portable.
PROGRAM DESIGN:
The important techniques which are useful in designing programs are as follows:
I/O Organization and System S/w & Programming Techniques Page 11
i) Modular Programming ii) Structured Programming iii) Top-down and bottom up design iv) Object
oriented programming (OOP)
i) Modular Programming:
When a program becomes very long and complex, it becomes a very difficult task for the
programmer to design, test and debug such a program. Therefore, a long program can be
divided into smaller programs called modules. A division of a long program into smaller
programs(or modules) is called modular programming.
ii) Structured Programming:
With the increasing capacity of the memory, the programs also became longer and longer. The
long and complex programs may be well understood by the programmers who developed but
not by the persons who had to maintain them. To overcome this difficulty a technique known as
structured programming was developed to write a program.
The three basic logic structures are:
i) Simple sequence structure: it is a linear structure in which instructions or statements
are executed consecutively in a sequence.
ii) Conditional structure: in this structure a condition is tested. The condition is followed
by two alternative program control paths.
False True
Conditio
n test
Else Then
Program 2 Program 1
iii) Loop structure: In DO WHILE loop structure, the program is executed once or more
while the condition is true. When the condition becomes false, the looping process
ends. In DO UNTIL structure the looping process is repeated until a condition becomes
true.
Program P
False
Conditio
n test
Class: the two examples given above Lecturer and Professor are similar. Both objects have the same set of data and
functions, and hence, they can be placed in the same class (or category). This class can be named “employee”. The class
employee includes clerks, librarians, peons, etc.,
x) S/W DEVELOPMENT
While preparing programs the following factors should get due considerations:
Reliability: A program must work reliably. It should perform the task properly for which it has been developed.
Speed: A program must execute the specified task quickly. The time taken by a program to perform a given task
should be as minimum as possible.
Programming Time and Cost: the cost of processors, memory and peripherals are decreasing but the cost of
programming is rising. Due to this reason more attention is being given on programming techniques like
structured programming and top down design which increase programmer’s output.
Ease of Use: A program must be easily understood by others.
Error Tolerance: a program must react to errors. It should give some information regarding errors or
malfunctions without shutting the entire system down.
Extendibility: A program that can be extended to tasks other than for which it has been designed and developed
is definitely a better program. The modular programming is more useful in attributing the feature of
extendibility to a program.
Some important operating systems are : UNIX, XENIX(version of UNIX, developed by Microsoft) ,
Windows Family of Operating system(windows-95-98,ME,XP, 2000,2003...),Sun’s Solaris, Apple’s Macintosh
(first operating system), Novell NetWare(network operating system)..