VLSI TECHNOLOGY & PROCESS MODELLING
LABORATORY (EC69214)
Dept. of Electronics and Electrical Communications Engineering
Indian Institute of Technology Kharagpur
29-01-2026
Experiment – 3 (Code)
Simulation of MOSFET using Silvaco Athena
Submitted by:
Group 06
Kalepu Keerthi Vallika Devi (22EC37007)
Shreya Shill (22EC37017)
Katrela Dedeepya (22EC37027)
1
Objective
The objective of this experiment is to design and simulate a two-dimensional NMOS
transistor using Silvaco Athena and Silvaco Atlas, illustrating the step-by-step CMOS
fabrication process. The experiment also aims to:
• To model the physical fabrication steps of an NMOS transistor such as oxidation,
ion implantation, diffusion, deposition, and etching using Silvaco Athena.
• To generate the two-dimensional device structure and define appropriate electrical
contacts.
• To perform electrical simulation using Silvaco Atlas to obtain:
– Drain current versus gate voltage (ID –VGS ) characteristics.
– Drain current versus drain voltage (ID –VDS ) characteristics.
• To study the effect of process parameters such as doping concentration, oxidation
conditions, temperature, and side-spacer thickness on the threshold voltage and
overall transistor characteristics.
2
Code
The changes made for different parts are mentioned through comments in the code.
go athena
# Defining mesh along x
line x loc =0.0 spac =0.1
line x loc =0.2 spac =0.01
line x loc =0.4 spac =0.01
line x loc =0.6 spac =0.01
# Defining mesh along y
line y loc =0.0 spac =0.01
line y loc =0.2 spac =0.01
line y loc =0.5 spac =0.05
line y loc =0.8 spac =0.15
# Defining initial substrate
init silicon orientation =100 c . phos =1 e14
# Oxidation
diffuse time =30 temp =1000 dryo2 press =1.00 hcl =3
# Etching Oxide
etch oxide thick =0.02
# Ion Implantation through Oxide to form p - well
implant boron dose =8 e12 energy =100 pearson
# Drive - in
diffuse temp =950 time =100 weto2 hcl =3
diffuse time =220 temp =1200 nitro press =1
# Etching remaining Oxide
etch oxide all
# Gate oxide growth // change this for part 2 as Vth changes
through this
diffuse time =11 temp =925 dryo2 press =1.00 hcl =3
# diffuse time =9 temp =925 dryo2 press =1.00 hcl =3
# diffuse time =13 temp =925 dryo2 press =1.00 hcl =3
3
# diffuse time =11 temp =950 dryo2 press =1.00 hcl =3
# diffuse time =9 temp =950 dryo2 press =1.00 hcl =3
# diffuse time =13 temp =950 dryo2 press =1.00 hcl =3
# diffuse time =11 temp =900 dryo2 press =1.00 hcl =3
# diffuse time =9 temp =900 dryo2 press =1.00 hcl =3
# diffuse time =13 temp =900 dryo2 press =1.00 hcl =3
# Ion Implantation through oxide for the p - well for the second
time
# Changed this for part 1
implant boron dose =9.5 e11 energy =10 pearson
# implant boron dose =9.5 e10 energy =10 pearson
# implant boron dose =9.5 e12 energy =10 pearson
# Deposition and Etching of Polysilicon Gate
depo poly thick =0.2 division =10
etch poly left p1 . x =0.35
# Formation of n + region in p - well by ion implantation and drive -
in
implant phosphor dose =2.0 e13 energy =20 pearson
# Spacer // Change this for part 3
# depo oxide thick =0.06 divisions =8 // thinner spacer
# etch oxide dry thick =0.06
depo oxide thick =0.12 divisions =8
etch oxide dry thick =0.12
# depo oxide thick =0.18 divisions =8 // thicker spacer
# etch oxide dry thick =0.18
#/ Spacer
implant arsenic dose =5.0 e15 energy =50 pearson
diffuse time =1 temp =900 nitro press =1.0
etch oxide left p1 . x =0.2
# Defining methods for Oxidation
method fermi compress
4
# Metal Deposition and Etching
deposit aluminum thick =0.03 division =2
etch aluminum right p1 . x =0.18
# Creating Mirror Image on the right
structure mirror right
# Naming the contact
electrode name = gate x =0.5 y =0.1
electrode name = source x =0.1
electrode name = drain x =1.1
electrode name = substrate backside
# Saving the Structure
structure outfile = MOSFET . str
tonyplot MOSFET . str
# Electrical Simulation ( Using Silvaco Atlas )
go atlas
models cvt srh print
contact name = gate n . poly
method newton
solve init
# ID - VGS Characteristics
solve vdrain =0.1
log outf = ID_VGS . log
solve vgate =0 vstep =0.25 vfinal =2.0 name = gate
log off
tonyplot ID_VGS . log
# Family of ID - VDS Curves
solve init
solve vgate =0.1
log outf = ID_VDS1 . log
solve vdrain =0 vstep =0.25 vfinal =2.0 name = drain
log off
solve vgate =0.6
log outf = ID_VDS2 . log
solve vdrain =0 vstep =0.25 vfinal =2.0 name = drain
5
log off
tonyplot ID_VDS2 . log
solve vgate =1.2
log outf = ID_VDS3 . log
solve vdrain =0 vstep =0.25 vfinal =2.0 name = drain
log off
solve vgate =1.8
log outf = ID_VDS4 . log
solve vdrain =0 vstep =0.25 vfinal =2.0 name = drain
log off
tonyplot overlay ID_VDS1 . log ID_VDS2 . log ID_VDS3 . log ID_VDS4 .
log
quit