Scribd
Upload
13 views5 pages

FET Frequency Response Analysis

The document describes an experiment to study the frequency response of a JFET. Activity 1 examines the effect of different capacitances (CG, CS, CC) individually and jointly on a voltage divider circuit using JFET J2N4393 from 0-100KHz. Activity 2 examines the combined effect of various capacitances (CDG, CGS, CDS, CWI, CWO) on the frequency response of an amplifier from 0-100MHz to determine the low and high cutoff frequencies. The results show low cutoff frequency of 300.4kHz and high cutoff frequency of 589.8kHz.

Uploaded by

shivkantmit2k4
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
13 views5 pages

FET Frequency Response Analysis

The document describes an experiment to study the frequency response of a JFET. Activity 1 examines the effect of different capacitances (CG, CS, CC) individually and jointly on a voltage divider circuit using JFET J2N4393 from 0-100KHz. Activity 2 examines the combined effect of various capacitances (CDG, CGS, CDS, CWI, CWO) on the frequency response of an amplifier from 0-100MHz to determine the low and high cutoff frequencies. The results show low cutoff frequency of 300.4kHz and high cutoff frequency of 589.8kHz.

Uploaded by

shivkantmit2k4
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

EXPERIMENT-5

AIM:-STUDY FREQUENCY RESPONSE OF FET.


Activity-1: For the given JFET-voltage divider circuits, examine the effect of CG, CS, CC individually and jointly on the given low frequency range of 0-100KHz, using J2N4393. Mathematically show that the results are close

correspondence with the simulated graphs.

Fig1.1

Case1:-when only drain capacitance connected.

Fig 1.2 Case 2:-when only capacitor across source are present

fig1.3 Case 3:-when only gate capacitor are connected

Fig1.4
Activity-2: Examine the combined effect of CDG (2pF), CGS (4pF) and CDS (0.5pF) CWI (5 pF), CWO (6pF) on high frequency response of above amplifier and draw the complete frequency response of the given amplifier circuit for the frequency range of 0-100MHz and come across the low and high cutoff frequencies (fL& fH).

Circuit diagram is

Fig 2.1 Frequency response

Fig2.2 Frequency 0-100Meg hz

Fig 2.3 Simulated result Fl= 300.4khz ,fh=589.8khz


Advantages: The main advantage is its high input resistance in the order of 100M ohms. Thus, it is a voltage-controlled device. It shows a high degree of isolation between input and output. It is a unipolar device, depending only upon majority current flow. It is less noisy and is thus found in FM tuners for quiet reception. It is relatively immune to radiation. It exhibits no offset voltage at zero drain current and hence makes an excellent signal chopper. It has thermal stability.

Disadvantages FET It has relatively low gain-bandwidth product. MOSFET has a drawback of being very susceptible to overload voltages, thus requiring special handling during installation.

You might also like