CPL A (complement A)
Registers/VHDL files needed:
register– [Link]
register2– [Link]
Process Pseudo Code:
process
process
o process
o process
process
process
Logic: logic of calculation here.
--Format above, delete after all done—
Logical Operators
CLR A (clear Accumulator)
Registers/VHDL files needed:
Accumulator – [Link]
Process Pseudo Code:
Send 00H to accumulator in [Link]
CPL A (complement Accumulator)
Registers/VHDL files needed:
Accumulator – [Link]
ALU – [Link]
Process Pseudo Code:
Ask for accumulator in [Link]
o Get accumulator and store in opr2
o Store FFH in opr1
o Send opr1 and opr2 to ALU for subtraction
Get back answer and store in opr1
Send opr1 to accumulator in [Link]
Logic: Accumulator holds an 8-bit binary data. To complement it, subtract it from 11111111b.
RL A (rotate accumulator left)
Registers/VHDL files needed:
Accumulator – [Link]
Process Pseudo Code:
Ask for accumulator in [Link]
o Get accumulator and store in tempAcc
o Send tempAcc bits(6 – 0) to Accumulator bits(7 – 1) & tempAcc bit(7) to
Accumulator bit (0)
Logic: If opr1 = 10110111b, to rotate left it should become 01101111b.
Original bits (6 – 0) will become bits (7 – 1) and original bit 7 will become bit 0.
Similar instructions:
RR A (rotate accumulator right)
o Send tempAcc bit(0) to Accumulator bit (7) & tempAcc bits(7–1) to
Accumulator bits(6–0)
SWAP A(swap nibbles within accumulator)
o Send tempAcc bit(3-0) to Accumulator bit (7-4) & tempAcc bits(7–4) to
Accumulator bits(3-0)
RLC A (rotate accumulator left through carry)
Registers/VHDL files needed:
Accumulator – [Link]
PSW bit 7 for carry flag - [Link]
Process Pseudo Code:
Ask for accumulator in [Link]
o Get accumulator and store in tempAcc
o Ask for carry bit in PSW in [Link]
o Get carry bit and store in tempCarry variable
o Send tempAcc bits(6 – 0) to Accumulator bits(7 – 1) & tempCarry to
Accumulator bit (0)
Logic: If opr1 = 10110111b and carry bit = 0, to rotate left it should become 01101110b.
Original bits (6 – 0) will become accumulator bits (7 – 1) and carry bit will become
accumulator bit 0.
Similar instructions:
RRC A (rotate accumulator right through)
o Send tempCarry to Accumulator bit (7) & tempAcc bits(7–1) to Accumulator
bits(6–0)
ARITHMETIC OPERATIONS
MUL AB (multiply A and B)
Registers/VHDL files needed:
Accumulator - [Link]
B – [Link]
[Link]
PSW bit 7(carry) in [Link]
PSW bit 2(overflow) in [Link]
Process Pseudo Code:
Ask for accumulator in [Link]
a. Get accumulator and store in tempAcc
b. Ask for B in [Link]
a. Get B and store in tempB
b. Send tempAcc and tempB to multiplier
a. Get back prod and store in tempProd
b. Send tempProd(7–0) to Accumulator
a. Send tempProd(15-8) to B
b. Check if tempProd(15-8) is equal to 00H
If tempProd(15-8) is equal to 0 then, send 0 to PSW bit 2. Else send 1 to PSW bit 2.
Send 0 to PSW bit 7
Similar instructions:
BOOLEAN VARIABLE MANIPULATION
CLR C (clear carry)
Registers/VHDL files needed:
PSW bit 7 for carry flag - [Link]
Process Pseudo Code:
Send 0b to PSW bit 7 in [Link]
Similar instructions:
SETB C (set carry)
o Send 1b to PSW bit 7 in [Link]
CPL C (complement carry)
o Ask for PSW bit 7 in [Link]
o
Get PSW bit 7 and store in temporary bit
Complement temporary bit
Send temporary bit to PSW bit 7 in [Link]