Tiny Software Protocol for communication over UART, SPI, etc

Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device

23LC1024 are 1 Mbit Serial SRAM devices. The memory is accessed via a simple SPI compatible serial bus.

A set of VHDL examples for DE0 Nano

spi driver for stm32 f4 family of microcontrollers . The library includes two flavor of apis which is blocking and non blocking ( interrupt based ) . library includes Apis to send and receive data .

STM32 HAL-based driver for the AD7124 24-bit Sigma-Delta ADC using interrupt-driven SPI communication.

Verification of spi protocol

A very basic bus sniffer and communicator (UART, SPI, I2C)

SPI driver for AVR microcontroller

A platform containing useful peripherals implemented in Chisel that can be attached together to complete the puzzle (SoC).

This repo contains code for custom drone flight and remote controller. A highly performant IMU and PID loop is implemented along with Low Latecy Secure Websocket network to tranceive data.

🎮 PCB designed to interface with an PS2 Controller using SPI Protocol

Transferring data from SPI to UART using BMP280 sensor with Verilog

Verilog implementations of different simple tasks

SPI is a synchronous, full duplex master-slave-based interface. The data from the master or the slave is synchronized on the rising or falling clock edge based on mode .Both master and slave can transmit data at the same time. The SPI interface got 4 wires.

SPI master have been implemented using Verilog in Xilinx Vivado

Simple program written in Assembly for software addressing, not hardware, to SPI protocol W25Q16JV flash memory

Demonstrates basic SPI communication on PIC32CM JH devices using MPLAB X and Harmony v3

This project demonstrates basic SPI (Serial Peripheral Interface) communication using an Arduino UNO as the Master device. It sends a sequence of 8-bit data values (0x80 → 0x01) through the SPI bus — a useful experiment for testing data shifting, LED control through SPI, or communication with SPI-based peripherals.

A complete UVM testbench for verifying an SPI memory controller. The environment includes configurable agents, constrained-random and directed sequences for read, write, reset, and error scenarios, protocol-driven driver and monitor, and a scoreboard that validates data consistency against an internal reference memory model.